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authorAndreas Krebbel <krebbel@gcc.gnu.org>2013-01-11 16:43:49 +0000
committerAndreas Krebbel <krebbel@gcc.gnu.org>2013-01-11 16:43:49 +0000
commit1abcd5eb462c4f64c4902b7208c5818094fcd9aa (patch)
tree209eef02337ad23839d03aa0a337cf669e303aa1 /gcc/config/s390
parent980d0812968529871862dc695ec3b013204e12dd (diff)
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re PR rtl-optimization/55719 (ICE: Segmentation fault)
2013-01-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> PR target/55719 * config/s390/s390.c (s390_preferred_reload_class): Do not return NO_REGS for larl operands. (s390_reload_larl_operand): Use s390_load_address instead of emit_move_insn. 2013-01-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> PR target/55719 * gcc.target/s390/pr55719.c: New testcase. From-SVN: r195109
Diffstat (limited to 'gcc/config/s390')
-rw-r--r--gcc/config/s390/s390.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 621f1bc..7e87dcd 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -2978,9 +2978,23 @@ s390_preferred_reload_class (rtx op, reg_class_t rclass)
it is most likely being used as an address, so
prefer ADDR_REGS. If 'class' is not a superset
of ADDR_REGS, e.g. FP_REGS, reject this reload. */
+ case CONST:
+ /* A larl operand with odd addend will get fixed via secondary
+ reload. So don't request it to be pushed into literal
+ pool. */
+ if (TARGET_CPU_ZARCH
+ && GET_CODE (XEXP (op, 0)) == PLUS
+ && GET_CODE (XEXP (XEXP(op, 0), 0)) == SYMBOL_REF
+ && GET_CODE (XEXP (XEXP(op, 0), 1)) == CONST_INT)
+ {
+ if (reg_class_subset_p (ADDR_REGS, rclass))
+ return ADDR_REGS;
+ else
+ return NO_REGS;
+ }
+ /* fallthrough */
case LABEL_REF:
case SYMBOL_REF:
- case CONST:
if (!legitimate_reload_constant_p (op))
return NO_REGS;
/* fallthrough */
@@ -3061,7 +3075,7 @@ s390_reload_larl_operand (rtx reg, rtx addr, rtx scratch)
emit_move_insn (scratch, symref);
/* Increment the address using la in order to avoid clobbering cc. */
- emit_move_insn (reg, gen_rtx_PLUS (Pmode, scratch, const1_rtx));
+ s390_load_address (reg, gen_rtx_PLUS (Pmode, scratch, const1_rtx));
}
}