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| author | Carl Love <cel@us.ibm.com> | 2018-02-23 17:22:10 +0000 |
|---|---|---|
| committer | Carl Love <carll@gcc.gnu.org> | 2018-02-23 17:22:10 +0000 |
| commit | c6839134ee53c7ee582145c7fb41f20305bf58cf (patch) | |
| tree | bafb3210db019438c3f06662f704feae1b942dad /gcc/config/rs6000 | |
| parent | c706366c317c0620e0cd84456687aa3b98a350cc (diff) | |
| download | gcc-c6839134ee53c7ee582145c7fb41f20305bf58cf.zip gcc-c6839134ee53c7ee582145c7fb41f20305bf58cf.tar.gz gcc-c6839134ee53c7ee582145c7fb41f20305bf58cf.tar.bz2 | |
rs6000-builtin.def: Change VSIGNED2 and VUNSIGNED2 macro expansions from BU_VSX_2 to BU_P8V_VSX_2...
gcc/ChangeLog:
2018-02-23 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-builtin.def: Change VSIGNED2 and VUNSIGNED2
macro expansions from BU_VSX_2 to BU_P8V_VSX_2 and BU_VSX_OVERLOAD_2 to
BU_P8V_OVERLOAD_2.
* config/rs6000/rs6000-c.c: Change VSX_BUILTIN_VEC_VSIGNED2 to
P8V_BUILTIN_VEC_VSIGNED2. Change VSX_BUILTIN_VEC_VUNSIGNED2 to
P8V_BUILTIN_VEC_VUNSIGNED2.
gcc/testsuite/ChangeLog:
2018-02-23 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-runnable.c: Move tests for vec_float2,
vec_signed2 and vec_unsigned2 to new Power 8 test file.
* gcc.target/powerpc/builtins-3-runnable-p8.c: New test file for
Power 8 tests.
From-SVN: r257937
Diffstat (limited to 'gcc/config/rs6000')
| -rw-r--r-- | gcc/config/rs6000/rs6000-builtin.def | 10 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-c.c | 4 |
2 files changed, 7 insertions, 7 deletions
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 876b1d9..f9548a0 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1659,9 +1659,6 @@ BU_VSX_2 (CMPLE_U8HI, "cmple_u8hi", CONST, vector_ngtuv8hi) BU_VSX_2 (CMPLE_U4SI, "cmple_u4si", CONST, vector_ngtuv4si) BU_VSX_2 (CMPLE_U2DI, "cmple_u2di", CONST, vector_ngtuv2di) -BU_VSX_2 (VEC_VSIGNED2_V2DF, "vsigned2_v2df", CONST, vsigned2_v2df) -BU_VSX_2 (VEC_VUNSIGNED2_V2DF, "vunsigned2_v2df", CONST, vunsigned2_v2df) - /* VSX abs builtin functions. */ BU_VSX_A (XVABSDP, "xvabsdp", CONST, absv2df2) BU_VSX_A (XVNABSDP, "xvnabsdp", CONST, vsx_nabsv2df2) @@ -1852,8 +1849,6 @@ BU_VSX_OVERLOAD_2 (XXMRGHW, "xxmrghw") BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw") BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd") BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw") -BU_VSX_OVERLOAD_2 (VSIGNED2, "vsigned2") -BU_VSX_OVERLOAD_2 (VUNSIGNED2, "vunsigned2") /* 1 argument VSX overloaded builtin functions. */ BU_VSX_OVERLOAD_1 (DOUBLE, "double") @@ -1917,6 +1912,9 @@ BU_P8V_AV_1 (NEG_V2DF, "neg_v2df", CONST, negv2df2) BU_P8V_VSX_2 (FLOAT2_V2DF, "float2_v2df", CONST, float2_v2df) BU_P8V_VSX_2 (FLOAT2_V2DI, "float2_v2di", CONST, float2_v2di) BU_P8V_VSX_2 (UNS_FLOAT2_V2DI, "uns_float2_v2di", CONST, uns_float2_v2di) +BU_P8V_VSX_2 (VEC_VSIGNED2_V2DF, "vsigned2_v2df", CONST, vsigned2_v2df) +BU_P8V_VSX_2 (VEC_VUNSIGNED2_V2DF, "vunsigned2_v2df", CONST, vunsigned2_v2df) + /* 1 argument altivec instructions added in ISA 2.07. */ BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2) @@ -2063,6 +2061,8 @@ BU_P8V_OVERLOAD_2 (VSUBUDM, "vsubudm") BU_P8V_OVERLOAD_2 (VSUBUQM, "vsubuqm") BU_P8V_OVERLOAD_2 (FLOAT2, "float2") BU_P8V_OVERLOAD_2 (UNS_FLOAT2, "uns_float2") +BU_P8V_OVERLOAD_2 (VSIGNED2, "vsigned2") +BU_P8V_OVERLOAD_2 (VUNSIGNED2, "vunsigned2") /* ISA 2.07 vector overloaded 3 argument functions. */ BU_P8V_OVERLOAD_3 (VADDECUQ, "vaddecuq") diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 6e4a269..cc8e4e1 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -5876,7 +5876,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, { VSX_BUILTIN_VEC_VSIGNEDO, VSX_BUILTIN_VEC_VSIGNEDO_V2DF, RS6000_BTI_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VSIGNED2, VSX_BUILTIN_VEC_VSIGNED2_V2DF, + { P8V_BUILTIN_VEC_VSIGNED2, P8V_BUILTIN_VEC_VSIGNED2_V2DF, RS6000_BTI_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, { VSX_BUILTIN_VEC_VUNSIGNED, VSX_BUILTIN_VEC_VUNSIGNED_V4SF, @@ -5887,7 +5887,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, { VSX_BUILTIN_VEC_VUNSIGNEDO, VSX_BUILTIN_VEC_VUNSIGNEDO_V2DF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, 0, 0 }, - { VSX_BUILTIN_VEC_VUNSIGNED2, VSX_BUILTIN_VEC_VUNSIGNED2_V2DF, + { P8V_BUILTIN_VEC_VUNSIGNED2, P8V_BUILTIN_VEC_VUNSIGNED2_V2DF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, |