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| author | Jakub Jelinek <jakub@redhat.com> | 2011-07-08 22:09:58 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-07-08 22:09:58 +0200 |
| commit | 70db9095eaefb4aeb985487010521d47ee018205 (patch) | |
| tree | 7bcf9c5b838741b00716f92f5cbc84858505c0ca /gcc/config/rs6000 | |
| parent | d6919c1f42428a468242b8d6c824361d18bc19b7 (diff) | |
| download | gcc-70db9095eaefb4aeb985487010521d47ee018205.zip gcc-70db9095eaefb4aeb985487010521d47ee018205.tar.gz gcc-70db9095eaefb4aeb985487010521d47ee018205.tar.bz2 | |
re PR target/49621 (ICE in trunc_int_for_mode, at explow.c:57)
PR target/49621
* config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use
CONST0_RTX (dest_mode) instead of const0_rtx as second operand
of NE.
* config/rs6000/vector.md (vector_select_<mode>,
vector_select_<mode>_uns): Change second operand of NE to
CONST0_RTX (<MODE>mode) instead of const0_rtx.
* config/rs6000/altivec.md (*altivec_vsel<mode>,
*altivec_vsel<mode>_uns): Expect second operand of NE to be
zero_constant of the corresponding vector mode.
* config/rs6000/vsx.md (*vsx_xxsel<mode>, *vsx_xxsel<mode>_uns):
Likewise.
* gcc.target/powerpc/altivec-34.c: New test.
From-SVN: r176063
Diffstat (limited to 'gcc/config/rs6000')
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/vector.md | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 4 |
4 files changed, 9 insertions, 9 deletions
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 5e803f6..9e7437e 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -487,7 +487,7 @@ [(set (match_operand:VM 0 "altivec_register_operand" "=v") (if_then_else:VM (ne:CC (match_operand:VM 1 "altivec_register_operand" "v") - (const_int 0)) + (match_operand:VM 4 "zero_constant" "")) (match_operand:VM 2 "altivec_register_operand" "v") (match_operand:VM 3 "altivec_register_operand" "v")))] "VECTOR_MEM_ALTIVEC_P (<MODE>mode)" @@ -498,7 +498,7 @@ [(set (match_operand:VM 0 "altivec_register_operand" "=v") (if_then_else:VM (ne:CCUNS (match_operand:VM 1 "altivec_register_operand" "v") - (const_int 0)) + (match_operand:VM 4 "zero_constant" "")) (match_operand:VM 2 "altivec_register_operand" "v") (match_operand:VM 3 "altivec_register_operand" "v")))] "VECTOR_MEM_ALTIVEC_P (<MODE>mode)" diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 65de2e3..475c104 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -16888,7 +16888,7 @@ rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, rtx op_false, op_false = tmp; } - cond2 = gen_rtx_fmt_ee (NE, cc_mode, mask, const0_rtx); + cond2 = gen_rtx_fmt_ee (NE, cc_mode, mask, CONST0_RTX (dest_mode)); emit_insn (gen_rtx_SET (VOIDmode, dest, gen_rtx_IF_THEN_ELSE (dest_mode, diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index c011250..4799ff2 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -465,21 +465,21 @@ [(set (match_operand:VEC_L 0 "vlogical_operand" "") (if_then_else:VEC_L (ne:CC (match_operand:VEC_L 3 "vlogical_operand" "") - (const_int 0)) + (match_dup 4)) (match_operand:VEC_L 2 "vlogical_operand" "") (match_operand:VEC_L 1 "vlogical_operand" "")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" - "") + "operands[4] = CONST0_RTX (<MODE>mode);") (define_expand "vector_select_<mode>_uns" [(set (match_operand:VEC_L 0 "vlogical_operand" "") (if_then_else:VEC_L (ne:CCUNS (match_operand:VEC_L 3 "vlogical_operand" "") - (const_int 0)) + (match_dup 4)) (match_operand:VEC_L 2 "vlogical_operand" "") (match_operand:VEC_L 1 "vlogical_operand" "")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)" - "") + "operands[4] = CONST0_RTX (<MODE>mode);") ;; Expansions that compare vectors producing a vector result and a predicate, ;; setting CR6 to indicate a combined status diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d4f5296..b4d1e8b 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -674,7 +674,7 @@ [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa") (if_then_else:VSX_L (ne:CC (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,wa") - (const_int 0)) + (match_operand:VSX_L 4 "zero_constant" "")) (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,wa") (match_operand:VSX_L 3 "vsx_register_operand" "<VSr>,wa")))] "VECTOR_MEM_VSX_P (<MODE>mode)" @@ -685,7 +685,7 @@ [(set (match_operand:VSX_L 0 "vsx_register_operand" "=<VSr>,?wa") (if_then_else:VSX_L (ne:CCUNS (match_operand:VSX_L 1 "vsx_register_operand" "<VSr>,wa") - (const_int 0)) + (match_operand:VSX_L 4 "zero_constant" "")) (match_operand:VSX_L 2 "vsx_register_operand" "<VSr>,wa") (match_operand:VSX_L 3 "vsx_register_operand" "<VSr>,wa")))] "VECTOR_MEM_VSX_P (<MODE>mode)" |