aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/rs6000/rs6000.md
diff options
context:
space:
mode:
authorJakub Jelinek <jakub@gcc.gnu.org>2006-01-27 20:59:49 +0100
committerJakub Jelinek <jakub@gcc.gnu.org>2006-01-27 20:59:49 +0100
commit602ea4d30716a6c72c6ee7fc8207a87e58a40d80 (patch)
treef8ce337caaf6de64c8851c52894637502cb77c32 /gcc/config/rs6000/rs6000.md
parent091c9413bb5e21d619ff38e5a5dcea2e78e0ae42 (diff)
downloadgcc-602ea4d30716a6c72c6ee7fc8207a87e58a40d80.zip
gcc-602ea4d30716a6c72c6ee7fc8207a87e58a40d80.tar.gz
gcc-602ea4d30716a6c72c6ee7fc8207a87e58a40d80.tar.bz2
[multiple changes]
2006-01-27 Jakub Jelinek <jakub@redhat.com> PR target/25864 * libgcc-std.ver: Add GCC_4.1.0 symbol version. * config/rs6000/t-linux64 (TARGET_LIBGCC2_CFLAGS): Only append -mno-minimal-toc to previous content. (bispecs): Remove goal. * config/rs6000/ppc64-fp.c: Define TMODES before including fp-bit.h. * config/rs6000/darwin-ldouble.c: Don't provide _xlq*@GCC_3.4 compatibility aliases on powerpc-*-*gnu*. * config/rs6000/libgcc-ppc-glibc.ver: New file. * config/rs6000/t-ppccomm (SHLIB_MAPFILES): Append libgcc-ppc-glibc.ver on powerpc*-*-*gnu*. (TARGET_LIBGCC2_CFLAGS): Append -specs=ldblspecs. (ldblspecs): New goal. * config/rs6000/t-linux64 (SHLIB_MAPFILES): Removed. * mklibgcc.in: If $TPBIT is empty, don't compile _sf_to_tf and _df_to_tf. * config/fp-bit.h (TMODES): Don't define if none of TFLOAT, L_sf_to_tf or L_df_to_tf is defined. 2006-01-27 David Edelsohn <edelsohn@gnu.org> Alan Modra <amodra@bigpond.net.au> PR target/25864 * config/rs6000/linux.h (POWERPC_LINUX): Define. * config/rs6000/linux64.h (POWERPC_LINUX): Define. * config/rs6000/darwin-ldouble.c: Build on 32-bit PowerPC. * config/rs6000/darwin.h (TARGET_IEEEQUAD): Define to zero. * config/rs6000/aix.h (TARGET_IEEEQUAD): Define to zero. * config/rs6000/rs6000.c (rs6000_ieeequad): New variable. (rs6000_override_options): Initialize rs6000_ieeequad. Initialize TFmode format to ibm_extended_format if not TARGET_IEEEQUAD. (rs6000_handle_option): Accept -mabi= ibmlongdouble and ieeelongdouble. (rs6000_emit_move): Move !TARGET_IEEEQUAD as two parts. (rs6000_return_in_memory): Only return IEEEQUAD in memory. (function_arg_advance): IBM long double passed in two FPRs, not split. (function_arg): IBM long double passed in FPRs. (rs6000_pass_by_reference): Only IEEEQUAD passed by reference. (rs6000_gimplify_va_arg): IBM long double passed in two FPRs. Only multireg GPR aligned. (rs6000_init_libfuncs): Enable IBM long double functions if not IEEEQUAD. (rs6000_generate_compare): Use IBM long double compare if not TARGET_IEEEQUAD. * config/rs6000/rs6000.h (rs6000_ieeequad): Declare. (TARGET_IEEEQUAD): Define. (CANNOT_CHANGE_MODE_CLASS): Any mode larger than doubleword if not TARGET_IEEEQUAD. * config/rs6000/rs6000.md: Enable TFmode patterns if !TARGET_IEEEQUAD. * config/rs6000/t-ppccomm (LIB2FUNCS_EXTRA): Add darwin-ldouble.c. * config/rs6000/svr4.h (SUBTARGET_OVERRIDE_OPTIONS): -msoft-float and -mlong-double-128 are incompatible. * doc/invoke.texi (-mabi): Collect options together. Add ibmlongdouble and ieeelongdouble. From-SVN: r110303
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
-rw-r--r--gcc/config/rs6000/rs6000.md39
1 files changed, 20 insertions, 19 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 17d8ef6..2dabd89 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,6 +1,7 @@
;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-;; 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+;; Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GCC.
@@ -151,7 +152,7 @@
; Any hardware-supported floating-point mode
(define_mode_macro FP [(SF "TARGET_HARD_FLOAT")
(DF "TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)")
- (TF "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ (TF "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128")])
; Various instructions that come in SI and DI forms.
@@ -8249,7 +8250,7 @@
(define_expand "movtf"
[(set (match_operand:TF 0 "general_operand" "")
(match_operand:TF 1 "any_operand" ""))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"{ rs6000_emit_move (operands[0], operands[1], TFmode); DONE; }")
@@ -8259,7 +8260,7 @@
(define_insn_and_split "*movtf_internal"
[(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,f,r,Y,r")
(match_operand:TF 1 "input_operand" "f,o,f,YGHF,r,r"))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128
&& (gpc_reg_operand (operands[0], TFmode)
|| gpc_reg_operand (operands[1], TFmode))"
@@ -8273,7 +8274,7 @@
[(parallel [(set (match_operand:TF 0 "nonimmediate_operand" "")
(float_extend:TF (match_operand:DF 1 "input_operand" "")))
(use (match_dup 2))])]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
{
operands[2] = CONST0_RTX (DFmode);
@@ -8283,7 +8284,7 @@
[(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,&f,r")
(float_extend:TF (match_operand:DF 1 "input_operand" "fr,mf,mf,rmGHF")))
(use (match_operand:DF 2 "zero_reg_mem_operand" "rf,m,f,n"))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
"&& reload_completed"
@@ -8301,7 +8302,7 @@
(define_expand "extendsftf2"
[(set (match_operand:TF 0 "nonimmediate_operand" "")
(float_extend:TF (match_operand:SF 1 "gpc_reg_operand" "")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
{
rtx tmp = gen_reg_rtx (DFmode);
@@ -8313,14 +8314,14 @@
(define_expand "trunctfdf2"
[(set (match_operand:DF 0 "gpc_reg_operand" "")
(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"")
(define_insn_and_split "trunctfdf2_internal1"
[(set (match_operand:DF 0 "gpc_reg_operand" "=f,?f")
(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "0,f")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && !TARGET_XL_COMPAT
+ "!TARGET_IEEEQUAD && !TARGET_XL_COMPAT
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"@
#
@@ -8336,7 +8337,7 @@
(define_insn "trunctfdf2_internal2"
[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "f")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && TARGET_XL_COMPAT
+ "!TARGET_IEEEQUAD && TARGET_XL_COMPAT
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"fadd %0,%1,%L1"
[(set_attr "type" "fp")])
@@ -8345,7 +8346,7 @@
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(float_truncate:SF (match_operand:TF 1 "gpc_reg_operand" "f")))
(clobber (match_scratch:DF 2 "=f"))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
"&& reload_completed"
@@ -8358,7 +8359,7 @@
(define_expand "floatsitf2"
[(set (match_operand:TF 0 "gpc_reg_operand" "=f")
(float:TF (match_operand:SI 1 "gpc_reg_operand" "r")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
{
rtx tmp = gen_reg_rtx (DFmode);
@@ -8386,7 +8387,7 @@
(clobber (match_dup 3))
(clobber (match_dup 4))
(clobber (match_dup 5))])]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& (TARGET_POWER2 || TARGET_POWERPC)
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
{
@@ -8403,7 +8404,7 @@
(clobber (match_operand:DF 3 "gpc_reg_operand" "=&f"))
(clobber (match_operand:DI 4 "gpc_reg_operand" "=f"))
(clobber (match_operand:DI 5 "memory_operand" "=o"))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
"&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[5]))"
@@ -8424,7 +8425,7 @@
(define_insn "negtf2"
[(set (match_operand:TF 0 "gpc_reg_operand" "=f")
(neg:TF (match_operand:TF 1 "gpc_reg_operand" "f")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"*
{
@@ -8439,7 +8440,7 @@
(define_expand "abstf2"
[(set (match_operand:TF 0 "gpc_reg_operand" "=f")
(abs:TF (match_operand:TF 1 "gpc_reg_operand" "f")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"
{
@@ -8459,7 +8460,7 @@
(label_ref (match_operand 2 "" ""))
(pc)))
(set (match_dup 6) (neg:DF (match_dup 6)))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
+ "!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"
{
@@ -11398,7 +11399,7 @@
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "f")
(match_operand:TF 2 "gpc_reg_operand" "f")))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && !TARGET_XL_COMPAT
+ "!TARGET_IEEEQUAD && !TARGET_XL_COMPAT
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"fcmpu %0,%1,%2\;bne %0,$+8\;fcmpu %0,%L1,%L2"
[(set_attr "type" "fpcompare")
@@ -11416,7 +11417,7 @@
(clobber (match_scratch:DF 8 "=f"))
(clobber (match_scratch:DF 9 "=f"))
(clobber (match_scratch:DF 10 "=f"))]
- "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && TARGET_XL_COMPAT
+ "!TARGET_IEEEQUAD && TARGET_XL_COMPAT
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
"&& reload_completed"