rs6000.c (num_insns_constant_wide): Correct for type promotion.

	* config/rs6000/rs6000.c (num_insns_constant_wide): Correct
	for type promotion.
	(add_operand): Get test correct for 64-bit HOST_WIDE_INT.
	(non_add_cint_operand): Likewise.
	(logical_operand): Likewise.
	(non_logical_cint_operand): Likewise.
	(print_operand): Correct printf()s for 64-bit HOST_WIDE_INT.
	(print_operand_address): Correct printf() for 64-bit HOST_WIDE_INT.
	(rs6000_select_rtx_section): Suppress warning.
	(small_data_operand): Suppress warning.
	(rs6000_got_register): Suppress warning.
	* config/rs6000/rs6000.md (andsi3): HOST_WIDE_INT is a signed
	type, so `J' is generally the wrong constraint for a SImode value;
	use `L' instead.
	(andsi3_internal2): Likewise.
	(andsi3_internal3): Likewise.
	(iorsi3_internal1): Likewise.
	(xorsi3_internal1): Likewise.
	(movsi): Likewise.
	(movsf_softfloat): Likewise.
	various unnamed compare insns: Likewise.
	(movsi+2): Preserve sign bits of SImode constant.
	(floatsidf2_internal+1): Sign-extend SImode constant correctly.
	(movdf+1): Preserve high bits of DFmode constant.
	(movdi_32+1): Sign-extend properly.
	various unnamed compare insns: Sign-extend properly.

	* unroll.c (loop_iterations): Convert HOST_WIDE_INT to unsigned
	properly for mode.
	* expmed.c (expand_mult_highpart): Convert HOST_WIDE_INT from unsigned
	properly for mode.
	(expand_divmod): Likewise.
	* optabs.c (expand_fix): Keep HOST_WIDE_INT constants properly signed.
	(expand_binop): Sometimes there is work to do when changing
	the mode of a CONST_INT.

From-SVN: r28375

1 files changed, 21 insertions, 20 deletions

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index baf0243..62de865 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1938,7 +1938,7 @@
 (define_insn "andsi3"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")
 	(and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r")
-		(match_operand:SI 2 "and_operand" "?r,T,K,J")))
+		(match_operand:SI 2 "and_operand" "?r,T,K,L")))
    (clobber (match_scratch:CC 3 "=X,X,x,x"))]
   ""
   "@
@@ -1955,7 +1955,7 @@
 (define_insn "*andsi3_internal2"
   [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y")
 	(compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r")
-			    (match_operand:SI 2 "and_operand" "r,K,J,T,r,K,J,T"))
+			    (match_operand:SI 2 "and_operand" "r,K,L,T,r,K,L,T"))
 		    (const_int 0)))
    (clobber (match_scratch:SI 3 "=r,r,r,r,r,r,r,r"))
    (clobber (match_scratch:CC 4 "=X,X,X,X,X,x,x,X"))]
@@ -1992,7 +1992,7 @@
 (define_insn "*andsi3_internal3"
   [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y")
 	(compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r")
-			    (match_operand:SI 2 "and_operand" "r,K,J,T,r,K,J,T"))
+			    (match_operand:SI 2 "and_operand" "r,K,L,T,r,K,L,T"))
 		    (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r")
 	(and:SI (match_dup 1)
@@ -2054,7 +2054,7 @@
 (define_insn "*iorsi3_internal1"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r")
 	(ior:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r")
-		(match_operand:SI 2 "logical_operand" "r,K,J")))]
+		(match_operand:SI 2 "logical_operand" "r,K,L")))]
   ""
   "@
    or %0,%1,%2
@@ -2161,7 +2161,7 @@
 (define_insn "*xorsi3_internal1"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r")
 	(xor:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r")
-		(match_operand:SI 2 "logical_operand" "r,K,J")))]
+		(match_operand:SI 2 "logical_operand" "r,K,L")))]
   ""
   "@
    xor %0,%1,%2
@@ -4226,7 +4226,7 @@
 		  (match_dup 3)))]
   "
 {
-  operands[6] = GEN_INT (0x80000000);
+  operands[6] = GEN_INT (~ (HOST_WIDE_INT) 0x7fffffff);
   operands[7] = gen_rtx_REG (DFmode, FPMEM_REGNUM);
 }")
 
@@ -6127,7 +6127,7 @@
 		(match_dup 3)))]
   "
 {
-  operands[2] = GEN_INT (INTVAL (operands[1]) & 0xffff0000);
+  operands[2] = GEN_INT (INTVAL (operands[1]) & (~ (HOST_WIDE_INT) 0xffff));
   operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff);
 }")
 
@@ -6383,7 +6383,7 @@
   int endian = (WORDS_BIG_ENDIAN == 0);
   operands[2] = operand_subword (operands[0], endian, 0, DFmode);
   operands[3] = operand_subword (operands[0], 1 - endian, 0, DFmode);
-  operands[4] = (INTVAL (operands[1]) & 0x80000000) ? constm1_rtx : const0_rtx;
+  operands[4] = GEN_INT(INTVAL (operands[1]) >> 31 >> 1);
 }")
 
 (define_split
@@ -6740,13 +6740,14 @@
    (set (match_dup 3) (match_dup 1))]
   "
 {
+  HOST_WIDE_INT value = INTVAL (operands[1]);
   operands[2] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN == 0);
   operands[3] = gen_rtx_SUBREG (SImode, operands[0], WORDS_BIG_ENDIAN != 0);
 #if HOST_BITS_PER_WIDE_INT == 32
-  operands[4] = (INTVAL (operands[1]) & 0x80000000) ? constm1_rtx : const0_rtx;
+  operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;
 #else
-  operands[4] = GEN_INT ((HOST_WIDE_INT) INTVAL (operands[1]) >> 32);
-  operands[1] = GEN_INT (INTVAL (operands[1]) & 0xffffffff);
+  operands[4] = GEN_INT (value >> 32);
+  operands[1] = GEN_INT ((value & 0x7fffffff) - (value & 0x80000000));
 #endif
 }")
 
@@ -8893,9 +8894,9 @@
      sign-extended to 16 bits.  Then see what constant could be XOR'ed
      with C to get the sign-extended value.  */
 
-  int c = INTVAL (operands[2]);
-  int sextc = (c << 16) >> 16;
-  int xorv = c ^ sextc;
+  HOST_WIDE_INT c = INTVAL (operands[2]);
+  HOST_WIDE_INT sextc = (c & 0x7fff) - (c & 0x8000);
+  HOST_WIDE_INT xorv = c ^ sextc;
 
   operands[4] = GEN_INT (xorv);
   operands[5] = GEN_INT (sextc);
@@ -9128,7 +9129,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
 	(eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-	       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I")))
+	       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I")))
    (clobber (match_scratch:SI 3 "=r,&r,r,r,r"))]
   ""
   "@
@@ -9157,7 +9158,7 @@
   [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x")
 	(compare:CC
 	 (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-		(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I"))
+		(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))
 	 (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
 	(eq:SI (match_dup 1) (match_dup 2)))
@@ -9209,7 +9210,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
 	(plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-			(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I"))
+			(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))
 		 (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r")))
    (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r"))]
   ""
@@ -9226,7 +9227,7 @@
 	(compare:CC
 	 (plus:SI
 	  (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-		 (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I"))
+		 (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))
 	  (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r"))
 	 (const_int 0)))
    (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r"))]
@@ -9245,7 +9246,7 @@
 	(compare:CC
 	 (plus:SI
 	  (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-		 (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I"))
+		 (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))
 	  (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r"))
 	 (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
@@ -9264,7 +9265,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
 	(neg:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-		       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,J,I"))))]
+		       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))))]
   ""
   "@
    xor %0,%1,%2\;{ai|addic} %0,%0,-1\;{sfe|subfe} %0,%0,%0