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author | Carl Love <cel@us.ibm.com> | 2018-02-16 17:30:45 +0000 |
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committer | Carl Love <carll@gcc.gnu.org> | 2018-02-16 17:30:45 +0000 |
commit | b8bf56035d234817d01bd26bf9ee7e64f790e692 (patch) | |
tree | 242cc394bf86720c7cc20fec865f85a945d1ab6e /gcc/config/rs6000/rs6000-builtin.def | |
parent | 280fa93e667c21e5fd3f3c758939376d35e47223 (diff) | |
download | gcc-b8bf56035d234817d01bd26bf9ee7e64f790e692.zip gcc-b8bf56035d234817d01bd26bf9ee7e64f790e692.tar.gz gcc-b8bf56035d234817d01bd26bf9ee7e64f790e692.tar.bz2 |
altivec.h: Add builtin names vec_extract4b vec_insert4b.
gcc/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h: Add builtin names vec_extract4b
vec_insert4b.
* config/rs6000/rs6000-builtin.def: Add INSERT4B and EXTRACT4B
definitions.
* config/rs6000/rs6000-c.c: Add the definitions for
P9V_BUILTIN_VEC_EXTRACT4B and P9V_BUILTIN_VEC_INSERT4B.
* config/rs6000/rs6000.c (altivec_expand_builtin): Add
P9V_BUILTIN_EXTRACT4B and P9V_BUILTIN_INSERT4B case statements.
* config/rs6000/vsx.md: Add define_insn extract4b. Add define_expand
definition for insert4b and define insn *insert3b_internal.
* doc/extend.texi: Add documentation for vec_extract4b.
gcc/testsuite/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-7-p9-runnable.c: New runnable test file
for the ABI definitions for vec_extract4b and vec_insert4b.
From-SVN: r257747
Diffstat (limited to 'gcc/config/rs6000/rs6000-builtin.def')
-rw-r--r-- | gcc/config/rs6000/rs6000-builtin.def | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 86604da..420d12e 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -2229,6 +2229,8 @@ BU_P9V_AV_2 (VEXTUWRX, "vextuwrx", CONST, vextuwrx) BU_P9V_VSX_2 (VEXTRACT4B, "vextract4b", CONST, vextract4b) BU_P9V_VSX_3 (VINSERT4B, "vinsert4b", CONST, vinsert4b) BU_P9V_VSX_3 (VINSERT4B_DI, "vinsert4b_di", CONST, vinsert4b_di) +BU_P9V_VSX_3 (INSERT4B, "insert4b", CONST, insert4b) +BU_P9V_VSX_2 (EXTRACT4B, "extract4b", CONST, extract4b) /* Hardware IEEE 128-bit floating point round to odd instrucitons added in ISA 3.0 (power9). */ @@ -2291,11 +2293,13 @@ BU_P9V_OVERLOAD_2 (XL_LEN_R, "xl_len_r") BU_P9V_OVERLOAD_2 (VEXTULX, "vextulx") BU_P9V_OVERLOAD_2 (VEXTURX, "vexturx") BU_P9V_OVERLOAD_2 (VEXTRACT4B, "vextract4b") +BU_P9V_OVERLOAD_2 (EXTRACT4B, "extract4b") /* ISA 3.0 Vector scalar overloaded 3 argument functions */ BU_P9V_OVERLOAD_3 (STXVL, "stxvl") BU_P9V_OVERLOAD_3 (XST_LEN_R, "xst_len_r") BU_P9V_OVERLOAD_3 (VINSERT4B, "vinsert4b") +BU_P9V_OVERLOAD_3 (INSERT4B, "insert4b") /* Overloaded CMPNE support was implemented prior to Power 9, so is not mentioned here. */ |