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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2017-11-15 21:21:32 +0000 |
|---|---|---|
| committer | William Schmidt <wschmidt@gcc.gnu.org> | 2017-11-15 21:21:32 +0000 |
| commit | 3ef9e1ec4bcd859fca2e8b80739ec5d98618bb23 (patch) | |
| tree | 9da9cffd707165901dd76848ea090b28101ab84b /gcc/config/rs6000/rs6000-builtin.def | |
| parent | cb8e79827943a491ccf190e9d05270ace2d64827 (diff) | |
| download | gcc-3ef9e1ec4bcd859fca2e8b80739ec5d98618bb23.zip gcc-3ef9e1ec4bcd859fca2e8b80739ec5d98618bb23.tar.gz gcc-3ef9e1ec4bcd859fca2e8b80739ec5d98618bb23.tar.bz2 | |
altivec.h (vec_xst_be): New #define.
[gcc]
2017-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.h (vec_xst_be): New #define.
* config/rs6000/altivec.md (altivec_vperm_<mode>_direct): Rename
and externalize from *altivec_vperm_<mode>_internal.
* config/rs6000/rs6000-builtin.def (XL_BE_V16QI): Remove macro
instantiation.
(XL_BE_V8HI): Likewise.
(XL_BE_V4SI): Likewise.
(XL_BE_V4SI): Likewise.
(XL_BE_V2DI): Likewise.
(XL_BE_V4SF): Likewise.
(XL_BE_V2DF): Likewise.
(XST_BE): Add BU_VSX_OVERLOAD_X macro instantiation.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Correct
all array entries with these keys: VSX_BUILTIN_VEC_XL,
VSX_BUILTIN_VEC_XL_BE, VSX_BUILTIN_VEC_XST. Add entries for key
VSX_BUILTIN_VEC_XST_BE.
* config/rs6000/rs6000.c (altivec_expand_xl_be_builtin): Remove.
(altivec_expand_builtin): Remove handling for VSX_BUILTIN_XL_BE_*
built-ins.
(altivec_init_builtins): Replace conditional calls to def_builtin
for __builtin_vsx_ld_elemrev_{v8hi,v16qi} and
__builtin_vsx_st_elemrev_{v8hi,v16qi} based on TARGET_P9_VECTOR
with unconditional calls. Remove calls to def_builtin for
__builtin_vsx_le_be_<mode>. Add a call to def_builtin for
__builtin_vec_xst_be.
* config/rs6000/vsx.md (vsx_ld_elemrev_v8hi): Convert define_insn
to define_expand, and add alternate RTL generation for P8.
(*vsx_ld_elemrev_v8hi_internal): New define_insn based on
vsx_ld_elemrev_v8hi.
(vsx_ld_elemrev_v16qi): Convert define_insn to define_expand, and
add alternate RTL generation for P8.
(*vsx_ld_elemrev_v16qi_internal): New define_insn based on
vsx_ld_elemrev_v16qi.
(vsx_st_elemrev_v8hi): Convert define_insn
to define_expand, and add alternate RTL generation for P8.
(*vsx_st_elemrev_v8hi_internal): New define_insn based on
vsx_st_elemrev_v8hi.
(vsx_st_elemrev_v16qi): Convert define_insn to define_expand, and
add alternate RTL generation for P8.
(*vsx_st_elemrev_v16qi_internal): New define_insn based on
vsx_st_elemrev_v16qi.
[gcc/testsuite]
2017-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/swaps-p8-26.c: Modify expected code
generation.
From-SVN: r254787
Diffstat (limited to 'gcc/config/rs6000/rs6000-builtin.def')
| -rw-r--r-- | gcc/config/rs6000/rs6000-builtin.def | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 6842c12..cfb6e55 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1774,14 +1774,6 @@ BU_VSX_X (LXVW4X_V4SF, "lxvw4x_v4sf", MEM) BU_VSX_X (LXVW4X_V4SI, "lxvw4x_v4si", MEM) BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM) BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM) - -BU_VSX_X (XL_BE_V16QI, "xl_be_v16qi", MEM) -BU_VSX_X (XL_BE_V8HI, "xl_be_v8hi", MEM) -BU_VSX_X (XL_BE_V4SI, "xl_be_v4si", MEM) -BU_VSX_X (XL_BE_V2DI, "xl_be_v2di", MEM) -BU_VSX_X (XL_BE_V4SF, "xl_be_v4sf", MEM) -BU_VSX_X (XL_BE_V2DF, "xl_be_v2df", MEM) - BU_VSX_X (STXSDX, "stxsdx", MEM) BU_VSX_X (STXVD2X_V1TI, "stxvd2x_v1ti", MEM) BU_VSX_X (STXVD2X_V2DF, "stxvd2x_v2df", MEM) @@ -1884,6 +1876,7 @@ BU_VSX_OVERLOAD_X (ST, "st") BU_VSX_OVERLOAD_X (XL, "xl") BU_VSX_OVERLOAD_X (XL_BE, "xl_be") BU_VSX_OVERLOAD_X (XST, "xst") +BU_VSX_OVERLOAD_X (XST_BE, "xst_be") /* 1 argument builtins pre ISA 2.04. */ BU_FP_MISC_1 (FCTID, "fctid", CONST, lrintdfdi2) |