RISC-V: Introduce RVV header to enable builtin types

gcc/ChangeLog:

	* config.gcc: Add riscv_vector.h.
	* config/riscv/riscv-builtins.cc: Add RVV builtin types support.
	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic): New function.
	(riscv_register_pragmas): Ditto.
	* config/riscv/riscv-protos.h (riscv_register_pragmas): Ditto.
	(init_builtins): Move declaration from riscv-vector-builtins.h to riscv-protos.h.
	(mangle_builtin_type): Ditto.
	(verify_type_context): Ditto.
	(handle_pragma_vector): New function.
	* config/riscv/riscv-vector-builtins.cc (GTY): New variable.
	(register_vector_type): New function.
	(init_builtins): Add RVV builtin types support.
	(handle_pragma_vector): New function.
	* config/riscv/riscv-vector-builtins.h (GCC_RISCV_V_BUILTINS_H): Change
	name according to file name.
	(GCC_RISCV_VECTOR_BUILTINS_H): Ditto.
	(init_builtins): Remove declaration in riscv-vector-builtins.h.
	(mangle_builtin_type): Ditto.
	(verify_type_context): Ditto.
	* config/riscv/riscv.cc: Adjust for RVV builtin types support.
	* config/riscv/riscv.h (REGISTER_TARGET_PRAGMAS): New macro.
	* config/riscv/t-riscv: Remove redundant file including.
	* config/riscv/riscv_vector.h: New file.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pragma-1.c: New test.
	* gcc.target/riscv/rvv/base/pragma-2.c: New test.
	* gcc.target/riscv/rvv/base/pragma-3.c: New test.
	* gcc.target/riscv/rvv/base/user-1.c: New test.
	* gcc.target/riscv/rvv/base/user-2.c: New test.
	* gcc.target/riscv/rvv/base/user-3.c: New test.
	* gcc.target/riscv/rvv/base/user-4.c: New test.
	* gcc.target/riscv/rvv/base/user-5.c: New test.
	* gcc.target/riscv/rvv/base/user-6.c: New test.
	* gcc.target/riscv/rvv/base/vread_csr.c: New test.
	* gcc.target/riscv/rvv/base/vwrite_csr.c: New test.

1 files changed, 5 insertions, 8 deletions

diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h
index a4a8c11..6ca0b07 100644
--- a/gcc/config/riscv/riscv-vector-builtins.h
+++ b/gcc/config/riscv/riscv-vector-builtins.h
@@ -18,11 +18,14 @@
    along with GCC; see the file COPYING3.  If not see
    <http://www.gnu.org/licenses/>.  */
 
-#ifndef GCC_RISCV_V_BUILTINS_H
-#define GCC_RISCV_V_BUILTINS_H
+#ifndef GCC_RISCV_VECTOR_BUILTINS_H
+#define GCC_RISCV_VECTOR_BUILTINS_H
 
 namespace riscv_vector {
 
+/* This is for segment instructions.  */
+const unsigned int MAX_TUPLE_SIZE = 8;
+
 /* Static information about each vector type.  */
 struct vector_type_info
 {
@@ -68,12 +71,6 @@ private:
   bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
 };
 
-void init_builtins ();
-const char *mangle_builtin_type (const_tree);
-#ifdef GCC_TARGET_H
-bool verify_type_context (location_t, type_context_kind, const_tree, bool);
-#endif
-
 } // end namespace riscv_vector
 
 #endif