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authoryulong <shiyulong@iscas.ac.cn>2024-12-02 09:31:53 +0800
committerKito Cheng <kito.cheng@sifive.com>2024-12-02 04:54:29 -0800
commit1352d4dd09293faf170072269fcef3aa6694d6ae (patch)
treee7ff6e055cc77656dc8e2afcb3f6f5b86b31f753 /gcc/config/riscv/riscv-vector-builtins.h
parent712cb2967bd91d4097e7125aa9d498a66e1654c5 (diff)
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RISC-V: Add intrinsics support for SiFive Xsfvfnrclipxfqf extensions.
This commit adds intrinsics support for XXsfvfnrclipxfqf. We also redefine the enum type frm_op_type in riscv-vector-builtins-bases.h file, because it be used in sifive-vector-builtins-bases.cc file. Co-Authored by: Jiawei Chen <jiawei@iscas.ac.cn> Co-Authored by: Shihua Liao <shihua@iscas.ac.cn> Co-Authored by: Yixuan Chen <chenyixuan@iscas.ac.cn> gcc/ChangeLog: * config/riscv/generic-vector-ooo.md: New reservation. * config/riscv/genrvv-type-indexer.cc (main): New type. * config/riscv/riscv-vector-builtins-bases.cc (enum frm_op_type): Delete it. * config/riscv/riscv-vector-builtins-bases.h (enum frm_op_type): Redefine in h file. * config/riscv/riscv-vector-builtins-shapes.cc (struct sf_vfnrclip_def): New function. (SHAPE): Ditto. * config/riscv/riscv-vector-builtins-shapes.h: Ditto. * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE_INDEX): New builtins def. * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX): New base def. (signed_eew8_index): Ditto. * config/riscv/riscv-vector-builtins.h (enum required_ext): New extension. (required_ext_to_isa_name): Ditto. (required_extensions_specified): Ditto. (struct function_group_info): Ditto. * config/riscv/riscv.md: New attr. * config/riscv/sifive-vector-builtins-bases.cc (class sf_vfnrclip_x_f_qf): New function. (class sf_vfnrclip_xu_f_qf): Ditto. (BASE): New base_name. * config/riscv/sifive-vector-builtins-bases.h: New function_base. * config/riscv/sifive-vector-builtins-functions.def (REQUIRED_EXTENSIONS): New intrinsics def. (sf_vfnrclip_x_f_qf): Ditto. (sf_vfnrclip_xu_f_qf): Ditto. * config/riscv/sifive-vector.md (@pred_sf_vfnrclip<v_su><mode>_x_f_qf): New RTL mode. * config/riscv/vector-iterators.md: New iterator.
Diffstat (limited to 'gcc/config/riscv/riscv-vector-builtins.h')
-rw-r--r--gcc/config/riscv/riscv-vector-builtins.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h
index fec024d..2602f6c 100644
--- a/gcc/config/riscv/riscv-vector-builtins.h
+++ b/gcc/config/riscv/riscv-vector-builtins.h
@@ -129,6 +129,7 @@ enum required_ext
ZVFBFWMA_EXT, /* Zvfbfwma extension */
XSFVQMACCQOQ_EXT, /* XSFVQMACCQOQ extension */
XSFVQMACCDOD_EXT, /* XSFVQMACCDOD extension */
+ XSFVFNRCLIPXFQF_EXT, /* XSFVFNRCLIPXFQF extension */
/* Please update below to isa_name func when add or remove enum type(s). */
};
@@ -166,6 +167,8 @@ static inline const char * required_ext_to_isa_name (enum required_ext required)
return "xsfvqmaccqoq";
case XSFVQMACCDOD_EXT:
return "xsfvqmaccdod";
+ case XSFVFNRCLIPXFQF_EXT:
+ return "xsfvfnrclipxfqf";
default:
gcc_unreachable ();
}
@@ -207,6 +210,8 @@ static inline bool required_extensions_specified (enum required_ext required)
return TARGET_XSFVQMACCQOQ;
case XSFVQMACCDOD_EXT:
return TARGET_XSFVQMACCDOD;
+ case XSFVFNRCLIPXFQF_EXT:
+ return TARGET_XSFVFNRCLIPXFQF;
default:
gcc_unreachable ();
}
@@ -351,6 +356,8 @@ struct function_group_info
return TARGET_XSFVQMACCQOQ;
case XSFVQMACCDOD_EXT:
return TARGET_XSFVQMACCDOD;
+ case XSFVFNRCLIPXFQF_EXT:
+ return TARGET_XSFVFNRCLIPXFQF;
default:
gcc_unreachable ();
}