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author | Pan Li <pan2.li@intel.com> | 2023-08-04 10:55:09 +0800 |
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committer | Pan Li <pan2.li@intel.com> | 2023-08-04 14:02:41 +0800 |
commit | dccd7e8a7215f3f2e295e11b20680d3add08cd7e (patch) | |
tree | aaf3c31ea39fe9cd96106e07581f3516848c01eb /gcc/config/riscv/riscv-vector-builtins-bases.h | |
parent | 62d9c1dd8eb1152d8fbe0e1df101b99c9141417a (diff) | |
download | gcc-dccd7e8a7215f3f2e295e11b20680d3add08cd7e.zip gcc-dccd7e8a7215f3f2e295e11b20680d3add08cd7e.tar.gz gcc-dccd7e8a7215f3f2e295e11b20680d3add08cd7e.tar.bz2 |
RISC-V: Support RVV VFMSAC rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFMSAC for the below samples.
* __riscv_vfmsac_vv_f32m1_rm
* __riscv_vfmsac_vv_f32m1_rm_m
* __riscv_vfmsac_vf_f32m1_rm
* __riscv_vfmsac_vf_f32m1_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(class vfmsac_frm): New class for vfmsac frm.
(vfmsac_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmsac_frm): New function definition.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-single-multiply-sub.c: New test.
Diffstat (limited to 'gcc/config/riscv/riscv-vector-builtins-bases.h')
-rw-r--r-- | gcc/config/riscv/riscv-vector-builtins-bases.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h b/gcc/config/riscv/riscv-vector-builtins-bases.h index 247074d..ca8a6dc 100644 --- a/gcc/config/riscv/riscv-vector-builtins-bases.h +++ b/gcc/config/riscv/riscv-vector-builtins-bases.h @@ -167,6 +167,7 @@ extern const function_base *const vfnmsub; extern const function_base *const vfnmacc; extern const function_base *const vfnmacc_frm; extern const function_base *const vfmsac; +extern const function_base *const vfmsac_frm; extern const function_base *const vfnmadd; extern const function_base *const vfmsub; extern const function_base *const vfwmacc; |