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| author | Pan Li <pan2.li@intel.com> | 2023-08-03 22:32:58 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-10 20:37:35 +0800 |
| commit | 07e93224f5dceb3423f38a58c2a1923c200cd5c8 (patch) | |
| tree | 4987d170f560f22ae5065ee8cb8bd65d4594ce63 /gcc/config/riscv/riscv-vector-builtins-bases.cc | |
| parent | 887f13916b18f46b563d527ad5001c6384e44a60 (diff) | |
| download | gcc-07e93224f5dceb3423f38a58c2a1923c200cd5c8.zip gcc-07e93224f5dceb3423f38a58c2a1923c200cd5c8.tar.gz gcc-07e93224f5dceb3423f38a58c2a1923c200cd5c8.tar.bz2 | |
RISC-V: Support RVV VFMACC rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFMACC for the below samples.
* __riscv_vfmacc_vv_f32m1_rm
* __riscv_vfmacc_vv_f32m1_rm_m
* __riscv_vfmacc_vf_f32m1_rm
* __riscv_vfmacc_vf_f32m1_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(class vfmacc_frm): New class for vfmacc frm.
(vfmacc_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfmacc_frm): New function definition.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-macc.c: New test.
Diffstat (limited to 'gcc/config/riscv/riscv-vector-builtins-bases.cc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-builtins-bases.cc | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc index afe3735..1695d77 100644 --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc @@ -356,6 +356,29 @@ public: } }; +/* Implements below instructions for frm + - vfmacc +*/ +class vfmacc_frm : public function_base +{ +public: + bool has_rounding_mode_operand_p () const override { return true; } + + bool has_merge_operand_p () const override { return false; } + + rtx expand (function_expander &e) const override + { + if (e.op_info->op == OP_TYPE_vf) + return e.use_ternop_insn (true, + code_for_pred_mul_scalar (PLUS, + e.vector_mode ())); + if (e.op_info->op == OP_TYPE_vv) + return e.use_ternop_insn (true, + code_for_pred_mul (PLUS, e.vector_mode ())); + gcc_unreachable (); + } +}; + /* Implements vrsub. */ class vrsub : public function_base { @@ -2116,6 +2139,7 @@ static CONSTEXPR const reverse_binop_frm<DIV> vfrdiv_frm_obj; static CONSTEXPR const widen_binop<MULT> vfwmul_obj; static CONSTEXPR const widen_binop_frm<MULT> vfwmul_frm_obj; static CONSTEXPR const vfmacc vfmacc_obj; +static CONSTEXPR const vfmacc_frm vfmacc_frm_obj; static CONSTEXPR const vfnmsac vfnmsac_obj; static CONSTEXPR const vfmadd vfmadd_obj; static CONSTEXPR const vfnmsub vfnmsub_obj; @@ -2351,6 +2375,7 @@ BASE (vfrdiv_frm) BASE (vfwmul) BASE (vfwmul_frm) BASE (vfmacc) +BASE (vfmacc_frm) BASE (vfnmsac) BASE (vfmadd) BASE (vfnmsub) |