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authorLiao Shihua <shihua@iscas.ac.cn>2023-02-20 15:01:23 +0800
committerKito Cheng <kito.cheng@sifive.com>2023-03-06 01:05:00 +0800
commit072c558a0f181bec139d68b451e7aa4907dbc5ef (patch)
treee39baa37aa3f6eb95c6b7e4ba9abf1ddb9a07d2b /gcc/config/riscv/crypto.md
parent2c8095109b8756bebc5d0ac2cc0ded34fd6a46df (diff)
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RISC-V: Implement ZKND and ZKNE extensions
This patch supports Zkne and Zknd extension. It includes instruction's machine description and built-in funtions. gcc/ChangeLog: * config/riscv/constraints.md (D03): Add constants of bs and rnum. (DsA): New. * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions. (riscv_aes32dsmi): New. (riscv_aes64ds): New. (riscv_aes64dsm): New. (riscv_aes64im): New. (riscv_aes64ks1i): New. (riscv_aes64ks2): New. (riscv_aes32esi): New. (riscv_aes32esmi): New. (riscv_aes64es): New. (riscv_aes64esm): New. * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL. * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and ZKNE's built-in functions. gcc/testsuite/ChangeLog: * gcc.target/riscv/zknd32.c: New test. * gcc.target/riscv/zknd64.c: New test. * gcc.target/riscv/zkne32.c: New test. * gcc.target/riscv/zkne64.c: New test. Co-Authored-By: SiYu Wu <siyu@isrc.iscas.ac.cn>
Diffstat (limited to 'gcc/config/riscv/crypto.md')
-rw-r--r--gcc/config/riscv/crypto.md121
1 files changed, 121 insertions, 0 deletions
diff --git a/gcc/config/riscv/crypto.md b/gcc/config/riscv/crypto.md
index a270036..7568466 100644
--- a/gcc/config/riscv/crypto.md
+++ b/gcc/config/riscv/crypto.md
@@ -33,6 +33,21 @@
;; Zbkx unspecs
UNSPEC_XPERM8
UNSPEC_XPERM4
+
+ ;; Zknd unspecs
+ UNSPEC_AES_DSI
+ UNSPEC_AES_DSMI
+ UNSPEC_AES_DS
+ UNSPEC_AES_DSM
+ UNSPEC_AES_IM
+ UNSPEC_AES_KS1I
+ UNSPEC_AES_KS2
+
+ ;; Zkne unspecs
+ UNSPEC_AES_ES
+ UNSPEC_AES_ESM
+ UNSPEC_AES_ESI
+ UNSPEC_AES_ESMI
])
;; ZBKB extension
@@ -126,3 +141,109 @@
"TARGET_ZBKX"
"xperm8\t%0,%1,%2"
[(set_attr "type" "crypto")])
+
+;; ZKND extension
+
+(define_insn "riscv_aes32dsi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "register_operand" "D03")]
+ UNSPEC_AES_DSI))]
+ "TARGET_ZKND && !TARGET_64BIT"
+ "aes32dsi\t%0,%1,%2,%3"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes32dsmi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "register_operand" "D03")]
+ UNSPEC_AES_DSMI))]
+ "TARGET_ZKND && !TARGET_64BIT"
+ "aes32dsmi\t%0,%1,%2,%3"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64ds"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:DI 2 "register_operand" "r")]
+ UNSPEC_AES_DS))]
+ "TARGET_ZKND && TARGET_64BIT"
+ "aes64ds\t%0,%1,%2"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64dsm"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:DI 2 "register_operand" "r")]
+ UNSPEC_AES_DSM))]
+ "TARGET_ZKND && TARGET_64BIT"
+ "aes64dsm\t%0,%1,%2"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64im"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")]
+ UNSPEC_AES_IM))]
+ "TARGET_ZKND && TARGET_64BIT"
+ "aes64im\t%0,%1"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64ks1i"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "DsA")]
+ UNSPEC_AES_KS1I))]
+ "(TARGET_ZKND || TARGET_ZKNE) && TARGET_64BIT"
+ "aes64ks1i\t%0,%1,%2"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64ks2"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:DI 2 "register_operand" "r")]
+ UNSPEC_AES_KS2))]
+ "(TARGET_ZKND || TARGET_ZKNE) && TARGET_64BIT"
+ "aes64ks2\t%0,%1,%2"
+ [(set_attr "type" "crypto")])
+
+;; ZKNE extension
+
+(define_insn "riscv_aes32esi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "register_operand" "D03")]
+ UNSPEC_AES_ESI))]
+ "TARGET_ZKNE && !TARGET_64BIT"
+ "aes32esi\t%0,%1,%2,%3"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes32esmi"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "register_operand" "D03")]
+ UNSPEC_AES_ESMI))]
+ "TARGET_ZKNE && !TARGET_64BIT"
+ "aes32esmi\t%0,%1,%2,%3"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64es"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:DI 2 "register_operand" "r")]
+ UNSPEC_AES_ES))]
+ "TARGET_ZKNE && TARGET_64BIT"
+ "aes64es\t%0,%1,%2"
+ [(set_attr "type" "crypto")])
+
+(define_insn "riscv_aes64esm"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "r")
+ (match_operand:DI 2 "register_operand" "r")]
+ UNSPEC_AES_ESM))]
+ "TARGET_ZKNE && TARGET_64BIT"
+ "aes64esm\t%0,%1,%2"
+ [(set_attr "type" "crypto")])