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authorRichard Sandiford <richard.sandiford@linaro.org>2017-11-01 09:20:15 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-11-01 09:20:15 +0000
commit59d06c050373919ed36a13b37103b6e069d8ebd3 (patch)
tree7dd263d0996c053d689121993600e51fa33249b4 /gcc/config/powerpcspe
parenta9b76c8962410173ba0351b5b05b5f1f91742fc6 (diff)
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Add gen_(const_)vec_duplicate helpers
This patch adds helper functions for generating constant and non-constant vector duplicates. These routines help with SVE because it is then easier to use: (const:M (vec_duplicate:M X)) for a broadcast of X, even if the number of elements in M isn't known at compile time. It also makes it easier for general rtx code to treat constant and non-constant duplicates in the same way. In the target code, the patch uses gen_vec_duplicate instead of gen_rtx_VEC_DUPLICATE if handling constants correctly is potentially useful. It might be that some or all of the call sites only handle non-constants in practice, in which case the change is a harmless no-op (and a saving of a few characters). Otherwise, the target changes use gen_const_vec_duplicate instead of gen_rtx_CONST_VECTOR if the constant is obviously a duplicate. They also include some changes to use CONSTxx_RTX for easy global constants. 2017-11-01 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * emit-rtl.h (gen_const_vec_duplicate): Declare. (gen_vec_duplicate): Likewise. * emit-rtl.c (gen_const_vec_duplicate_1): New function, split out from... (gen_const_vector): ...here. (gen_const_vec_duplicate, gen_vec_duplicate): New functions. (gen_rtx_CONST_VECTOR): Use gen_const_vec_duplicate for constants whose elements are all equal. * optabs.c (expand_vector_broadcast): Use gen_const_vec_duplicate. * simplify-rtx.c (simplify_const_unary_operation): Likewise. (simplify_relational_operation): Likewise. * config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup): Likewise. (aarch64_simd_dup_constant): Use gen_vec_duplicate. (aarch64_expand_vector_init): Likewise. * config/arm/arm.c (neon_vdup_constant): Likewise. (neon_expand_vector_init): Likewise. (arm_expand_vec_perm): Use gen_const_vec_duplicate. (arm_block_set_unaligned_vect): Likewise. (arm_block_set_aligned_vect): Likewise. * config/arm/neon.md (neon_copysignf<mode>): Likewise. * config/i386/i386.c (ix86_expand_vec_perm): Likewise. (expand_vec_perm_even_odd_pack): Likewise. (ix86_vector_duplicate_value): Use gen_vec_duplicate. * config/i386/sse.md (one_cmpl<mode>2): Use CONSTM1_RTX. * config/ia64/ia64.c (ia64_expand_vecint_compare): Use gen_const_vec_duplicate. * config/ia64/vect.md (addv2sf3, subv2sf3): Use CONST1_RTX. * config/mips/mips.c (mips_gen_const_int_vector): Use gen_const_vec_duplicate. (mips_expand_vector_init): Use CONST0_RTX. * config/powerpcspe/altivec.md (abs<mode>2, nabs<mode>2): Likewise. (define_split): Use gen_const_vec_duplicate. * config/rs6000/altivec.md (abs<mode>2, nabs<mode>2): Use CONST0_RTX. (define_split): Use gen_const_vec_duplicate. * config/s390/vx-builtins.md (vec_genmask<mode>): Likewise. (vec_ctd_s64, vec_ctd_u64, vec_ctsl, vec_ctul): Likewise. * config/spu/spu.c (spu_const): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r254292
Diffstat (limited to 'gcc/config/powerpcspe')
-rw-r--r--gcc/config/powerpcspe/altivec.md28
1 files changed, 3 insertions, 25 deletions
diff --git a/gcc/config/powerpcspe/altivec.md b/gcc/config/powerpcspe/altivec.md
index e98309a..f1cc6e2 100644
--- a/gcc/config/powerpcspe/altivec.md
+++ b/gcc/config/powerpcspe/altivec.md
@@ -352,12 +352,10 @@
HOST_WIDE_INT val = const_vector_elt_as_int (op1, elt);
rtx rtx_val = GEN_INT (val);
int shift = vspltis_shifted (op1);
- int nunits = GET_MODE_NUNITS (<MODE>mode);
- int i;
gcc_assert (shift != 0);
operands[2] = gen_reg_rtx (<MODE>mode);
- operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, rtvec_alloc (nunits));
+ operands[3] = gen_const_vec_duplicate (<MODE>mode, rtx_val);
operands[4] = gen_reg_rtx (<MODE>mode);
if (shift < 0)
@@ -370,10 +368,6 @@
operands[5] = CONST0_RTX (<MODE>mode);
operands[6] = GEN_INT (shift);
}
-
- /* Populate the constant vectors. */
- for (i = 0; i < nunits; i++)
- XVECEXP (operands[3], 0, i) = rtx_val;
})
(define_insn "get_vrsave_internal"
@@ -2752,15 +2746,8 @@
(smax:VI2 (match_dup 1) (match_dup 4)))]
"<VI_unit>"
{
- int i, n_elt = GET_MODE_NUNITS (<MODE>mode);
- rtvec v = rtvec_alloc (n_elt);
-
- /* Create an all 0 constant. */
- for (i = 0; i < n_elt; ++i)
- RTVEC_ELT (v, i) = const0_rtx;
-
operands[2] = gen_reg_rtx (<MODE>mode);
- operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);
+ operands[3] = CONST0_RTX (<MODE>mode);
operands[4] = gen_reg_rtx (<MODE>mode);
})
@@ -2777,17 +2764,8 @@
(smin:VI2 (match_dup 1) (match_dup 4)))]
"<VI_unit>"
{
- int i;
- int n_elt = GET_MODE_NUNITS (<MODE>mode);
-
- rtvec v = rtvec_alloc (n_elt);
-
- /* Create an all 0 constant. */
- for (i = 0; i < n_elt; ++i)
- RTVEC_ELT (v, i) = const0_rtx;
-
operands[2] = gen_reg_rtx (<MODE>mode);
- operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);
+ operands[3] = CONST0_RTX (<MODE>mode);
operands[4] = gen_reg_rtx (<MODE>mode);
})