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authorJeffrey A Law <law@cygnus.com>1998-04-01 05:20:26 +0000
committerJeff Law <law@gcc.gnu.org>1998-03-31 22:20:26 -0700
commit3a598fbeb416142a7b9aa9a332eab71c1828d36b (patch)
tree84f0e70b65ebdc968e5fa3ba0c8eac667a10255b /gcc/config/pdp11/pdp11.md
parenta26fd1652b6b8280eee7746c25d7c083d72ba29b (diff)
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1750a.md, [...]: Use GEN_INT consistently.
* 1750a.md, arm.c, clipper.c, clipper.md: Use GEN_INT consistently. * convex.h, dsp16xx.c, fx80.md, gmicro.c, gmicro.md: Likewise. * i370.h, i370.md, i860.c, i860.h, i860.md, i960.c: Likewise. * i960.h, i960.md, m32r.md, m68k.md, m68kv4.h, m88k.c: Likewise. * m88k.md, ns32k.c, ns32k.md, pdp11.c, pdp11.h, pdp11.md: Likewise. * pyr.c, pyr.h, pyr.md, romp.c, romp.h, romp.md: Likewise. * rs6000.md, sparc.c, sparc.h, sparc.md, spur.c, spur.md: Likewise. * tahoe.md, vax.h, vax.md, we32k.c, we32k.h, we32k.md: Likewise. * md.texi: Likewise. From-SVN: r18927
Diffstat (limited to 'gcc/config/pdp11/pdp11.md')
-rw-r--r--gcc/config/pdp11/pdp11.md47
1 files changed, 26 insertions, 21 deletions
diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md
index d23c2cd..f93d1ce 100644
--- a/gcc/config/pdp11/pdp11.md
+++ b/gcc/config/pdp11/pdp11.md
@@ -1,5 +1,5 @@
;;- Machine description for the pdp11 for GNU C compiler
-;; Copyright (C) 1994, 1995 Free Software Foundation, Inc.
+;; Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc.
;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
;; This file is part of GNU CC.
@@ -48,7 +48,7 @@
;; The only thing that remains to be done then is output
;; the floats in a way the assembler can handle it (and
;; if you're really into it, use a PDP11 float emulation
-;; libary to do floating point constant folding - but
+;; library to do floating point constant folding - but
;; I guess you'll get reasonable results even when not
;; doing this)
;; the last thing to do is fix the UPDATE_CC macro to check
@@ -682,20 +682,26 @@
;; let constraints only accept a register ...
(define_expand "movstrhi"
- [(parallel [(set (mem:BLK (match_operand:BLK 0 "general_operand" "=g,g"))
- (mem:BLK (match_operand:BLK 1 "general_operand" "g,g")))
+ [(parallel [(set (match_operand:BLK 0 "general_operand" "=g,g")
+ (match_operand:BLK 1 "general_operand" "g,g"))
(use (match_operand:HI 2 "arith_operand" "n,&mr"))
(use (match_operand:HI 3 "immediate_operand" "i,i"))
(clobber (match_scratch:HI 4 "=&r,X"))
- (clobber (match_dup 0))
- (clobber (match_dup 1))
+ (clobber (match_dup 5))
+ (clobber (match_dup 6))
(clobber (match_dup 2))])]
"(TARGET_BCOPY_BUILTIN)"
"
{
- operands[0] = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
- operands[1] = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));
- operands[2] = force_not_mem (operands[2]);
+ operands[0]
+ = change_address (operands[0], VOIDmode,
+ copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
+ operands[1]
+ = change_address (operands[1], VOIDmode,
+ copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
+
+ operands[5] = XEXP (operands[0], 0);
+ operands[6] = XEXP (operands[1], 0);
}")
@@ -1010,8 +1016,8 @@
return \"\";
}
- lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff);
- operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff);
+ lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff);
+ operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff);
if (INTVAL(operands[2]))
{
@@ -1148,7 +1154,7 @@
{
extern rtx expand_unop ();
if (GET_CODE (operands[2]) == CONST_INT)
- operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2]));
+ operands[2] = GEN_INT (~INTVAL (operands[2]));
else
operands[2] = expand_unop (SImode, one_cmpl_optab, operands[2], 0, 1);
}")
@@ -1162,7 +1168,7 @@
{
extern rtx expand_unop ();
if (GET_CODE (operands[2]) == CONST_INT)
- operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2]));
+ operands[2] = GEN_INT (~INTVAL (operands[2]));
else
operands[2] = expand_unop (HImode, one_cmpl_optab, operands[2], 0, 1);
}")
@@ -1177,8 +1183,7 @@
extern rtx expand_unop ();
rtx op = operands[2];
if (GET_CODE (op) == CONST_INT)
- operands[2] = gen_rtx (CONST_INT, VOIDmode,
- ((1 << 8) - 1) & ~INTVAL (op));
+ operands[2] = GEN_INT (((1 << 8) - 1) & ~INTVAL (op));
else
operands[2] = expand_unop (QImode, one_cmpl_optab, op, 0, 1);
}")
@@ -1217,8 +1222,8 @@
return \"\";
}
- lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff);
- operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff);
+ lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff);
+ operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff);
/* these have different lengths, so we should have
different constraints! */
@@ -1283,8 +1288,8 @@
return \"\";
}
- lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff);
- operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff);
+ lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff);
+ operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff);
/* these have different lengths, so we should have
different constraints! */
@@ -1339,8 +1344,8 @@
return \"\";
}
- lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff);
- operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff);
+ lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff);
+ operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff);
if (INTVAL(operands[2]))
output_asm_insn (\"xor %2, %0\", operands);