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authorJohn David Anglin <dave.anglin@nrc-cnrc.gc.ca>2007-12-09 18:02:08 +0000
committerJohn David Anglin <danglin@gcc.gnu.org>2007-12-09 18:02:08 +0000
commit6982c5d4c822b89dcfa6b5554505997ab183e39b (patch)
tree6c03efab36b85bc299f7ba354cfa23f643d60a6a /gcc/config/pa/pa32-regs.h
parentfad0afd7d72cb63e47e70795baac30cb2880314a (diff)
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re PR target/32889 (ICE in delete_output_reload, at reload1.c:7926)
PR middle-end/32889 PR target/34091 * pa.md: Consolidate HImode and QImode move patterns into one pattern each, eliminating floating-point alternatives. * pa-protos.h (pa_cannot_change_mode_class, pa_modes_tieable_p): Declare functions. * pa-64.h (SECONDARY_MEMORY_NEEDED): Define here. * pa.c (pa_secondary_reload): Use an intermediate general register for copies to/from floating-point register classes. Simplify code SHIFT_REGS class. Provide additional comments. (pa_cannot_change_mode_class, pa_modes_tieable_p): New functions. * pa.h (MODES_TIEABLE_P): Use pa_modes_tieable_p. (SECONDARY_MEMORY_NEEDED): Delete define. (INT14_OK_STRICT): Define. (MODE_OK_FOR_SCALED_INDEXING_P): Allow SFmode and DFmode when using soft float. (MODE_OK_FOR_UNSCALED_INDEXING_P): Likewise. (GO_IF_LEGITIMATE_ADDRESS): Use INT14_OK_STRICT in REG+D case for SFmode and DFmode. (LEGITIMIZE_RELOAD_ADDRESS): Use INT14_OK_STRICT in mask selection. Align DImode offsets when generating 64-bit code. * pa32-regs.h (VALID_FP_MODE_P): Remove QImode and HImode. (CANNOT_CHANGE_MODE_CLASS): Define. * pa64-regs.h (VALID_FP_MODE_P): Remove QImode and HImode. (CANNOT_CHANGE_MODE_CLASS): Define using pa_cannot_change_mode_class. From-SVN: r130725
Diffstat (limited to 'gcc/config/pa/pa32-regs.h')
-rw-r--r--gcc/config/pa/pa32-regs.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/gcc/config/pa/pa32-regs.h b/gcc/config/pa/pa32-regs.h
index 782ad8d..89cbb9b 100644
--- a/gcc/config/pa/pa32-regs.h
+++ b/gcc/config/pa/pa32-regs.h
@@ -172,8 +172,7 @@
#define VALID_FP_MODE_P(MODE) \
((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == SCmode || (MODE) == DCmode \
- || (MODE) == QImode || (MODE) == HImode || (MODE) == SImode \
- || (TARGET_PA_11 && (MODE) == DImode))
+ || (MODE) == SImode || (TARGET_PA_11 && (MODE) == DImode))
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
@@ -288,6 +287,11 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
{0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
{0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
+/* Defines invalid mode changes. */
+
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+ pa_cannot_change_mode_class (FROM, TO, CLASS)
+
/* Return the class number of the smallest class containing
reg number REGNO. This could be a conditional expression
or could index an array. */