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authorJohn David Anglin <danglin@gcc.gnu.org>2015-04-02 11:29:48 +0000
committerJohn David Anglin <danglin@gcc.gnu.org>2015-04-02 11:29:48 +0000
commit166d826fdcb51cb30cb358b1e90b4ff454111801 (patch)
tree2e34f4ae9aff9b0fc01362a0193a12adae75dc47 /gcc/config/pa/pa.c
parente61ffb3b5acbf364d0f2bbf4e33475e8ccaadb7d (diff)
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pa.c (pa_output_move_double): Directly handle register indexed memory operand.
* config/pa/pa.c (pa_output_move_double): Directly handle register indexed memory operand. Simplify handling of scaled register indexed memory operands. From-SVN: r221835
Diffstat (limited to 'gcc/config/pa/pa.c')
-rw-r--r--gcc/config/pa/pa.c43
1 files changed, 22 insertions, 21 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 2f2735c..d5b0c50 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -2595,28 +2595,29 @@ pa_output_move_double (rtx *operands)
&& GET_CODE (XEXP (addr, 0)) == MULT)
{
rtx xoperands[4];
- rtx high_reg = gen_rtx_SUBREG (SImode, operands[0], 0);
- if (!reg_overlap_mentioned_p (high_reg, addr))
- {
- xoperands[0] = high_reg;
- xoperands[1] = XEXP (addr, 1);
- xoperands[2] = XEXP (XEXP (addr, 0), 0);
- xoperands[3] = XEXP (XEXP (addr, 0), 1);
- output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
- xoperands);
- return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
- }
- else
- {
- xoperands[0] = high_reg;
- xoperands[1] = XEXP (addr, 1);
- xoperands[2] = XEXP (XEXP (addr, 0), 0);
- xoperands[3] = XEXP (XEXP (addr, 0), 1);
- output_asm_insn ("{sh%O3addl %2,%1,%R0|shladd,l %2,%O3,%1,%R0}",
- xoperands);
- return "ldw 0(%R0),%0\n\tldw 4(%R0),%R0";
- }
+ /* Load address into left half of destination register. */
+ xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
+ xoperands[1] = XEXP (addr, 1);
+ xoperands[2] = XEXP (XEXP (addr, 0), 0);
+ xoperands[3] = XEXP (XEXP (addr, 0), 1);
+ output_asm_insn ("{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0}",
+ xoperands);
+ return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
+ }
+ else if (GET_CODE (addr) == PLUS
+ && REG_P (XEXP (addr, 0))
+ && REG_P (XEXP (addr, 1)))
+ {
+ rtx xoperands[3];
+
+ /* Load address into left half of destination register. */
+ xoperands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
+ xoperands[1] = XEXP (addr, 0);
+ xoperands[2] = XEXP (addr, 1);
+ output_asm_insn ("{addl|add,l} %1,%2,%0",
+ xoperands);
+ return "ldw 4(%0),%R0\n\tldw 0(%0),%0";
}
}