Merge in gcc2-ss-010999

From-SVN: r29150

3 files changed, 36 insertions, 40 deletions

diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c
index cfc7cd2..ab7535c 100644
--- a/gcc/config/ns32k/ns32k.c
+++ b/gcc/config/ns32k/ns32k.c
@@ -1,5 +1,5 @@
 /* Subroutines for assembler code output on the NS32000.
-   Copyright (C) 1988, 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
+   Copyright (C) 1988, 94, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -18,7 +18,6 @@ along with GNU CC; see the file COPYING.  If not, write to
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
-/* Some output-actions in ns32k.md need these.  */
 #include "config.h"
 #include "system.h"
 #include "rtl.h"
@@ -208,10 +207,10 @@ gen_indexed_expr (base, index, scale)
   /* This generates an invalid addressing mode, if BASE is
      fp or sp.  This is handled by PRINT_OPERAND_ADDRESS.  */
   if (GET_CODE (base) != REG && GET_CODE (base) != CONST_INT)
-    base = gen_rtx (MEM, SImode, base);
-  addr = gen_rtx (MULT, SImode, index,
-		  GEN_INT (1 << INTVAL (scale)));
-  addr = gen_rtx (PLUS, SImode, base, addr);
+    base = gen_rtx_MEM (SImode, base);
+  addr = gen_rtx_MULT (SImode, index,
+		       GEN_INT (1 << INTVAL (scale)));
+  addr = gen_rtx_PLUS (SImode, base, addr);
   return addr;
 }
 
@@ -246,8 +245,8 @@ split_di (operands, num, lo_half, hi_half)
     {
       if (GET_CODE (operands[num]) == REG)
 	{
-	  lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]));
-	  hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1);
+	  lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]));
+	  hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1);
 	}
       else if (CONSTANT_P (operands[num]))
 	{
@@ -324,14 +323,14 @@ output_move_double (operands)
      operands in OPERANDS to be suitable for the low-numbered word.  */
 
   if (optype0 == REGOP)
-    latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+    latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
   else if (optype0 == OFFSOP)
     latehalf[0] = adj_offsettable_operand (operands[0], 4);
   else
     latehalf[0] = operands[0];
 
   if (optype1 == REGOP)
-    latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+    latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
   else if (optype1 == OFFSOP)
     latehalf[1] = adj_offsettable_operand (operands[1], 4);
   else if (optype1 == CNSTOP)
@@ -382,7 +381,7 @@ output_move_double (operands)
 	  xops[0] = XEXP (operands[1], 0);
 	  xops[1] = operands[0];
 	  output_asm_insn ("addr %a0,%1", xops);
-	  operands[1] = gen_rtx (MEM, DImode, operands[0]);
+	  operands[1] = gen_rtx_MEM (DImode, operands[0]);
 	  latehalf[1] = adj_offsettable_operand (operands[1], 4);
 	  /* The first half has the overlap, Do the late half first.  */
 	  output_asm_insn (singlemove_string (latehalf), latehalf);
@@ -968,7 +967,7 @@ print_operand_address (file, addr)
 	case CONST_INT:
 	case LABEL_REF:
 	  if (offset)
-	    offset = gen_rtx (PLUS, SImode, tmp, offset);
+	    offset = gen_rtx_PLUS (SImode, tmp, offset);
 	  else
 	    offset = tmp;
 	  break;
@@ -1063,7 +1062,7 @@ print_operand_address (file, addr)
 	      case SYMBOL_REF:
 	      case LABEL_REF:
 		if (offset)
-		  offset = gen_rtx (PLUS, SImode, tmp, offset);
+		  offset = gen_rtx_PLUS (SImode, tmp, offset);
 		else
 		  offset = tmp;
 		break;
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 5e0268c..71df54a 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler.  NS32000 version.
-   Copyright (C) 1988, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
+   Copyright (C) 1988, 93, 94-98, 1999 Free Software Foundation, Inc.
    Contributed by Michael Tiemann (tiemann@cygnus.com)
 
 This file is part of GNU CC.
@@ -587,8 +587,8 @@ enum reg_class
    or perhaps F0 is there is fp support.  */
 
 #define LIBCALL_VALUE(MODE)  \
-  gen_rtx (REG, MODE,				  \
-	   FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
+  gen_rtx_REG (MODE,				  \
+	       FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
 
 /* Define this if PCC uses the nonreentrant convention for returning
    structure and union values.  */
@@ -653,7 +653,7 @@ enum reg_class
    It exists only to test register calling conventions.  */
 
 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
-((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
+((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
 
 /* For an arg passed partly in registers and partly in memory,
    this is the number of registers used.
@@ -941,8 +941,8 @@ operands on the 32k are stored).  */
 
 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)			     \
 {									     \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT);    \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
+  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT);    \
+  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
 }
 
 /* This is the library routine that is used
diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md
index c5fe160..dfe6629 100644
--- a/gcc/config/ns32k/ns32k.md
+++ b/gcc/config/ns32k/ns32k.md
@@ -1,5 +1,5 @@
 ;;- Machine description for GNU compiler, ns32000 Version
-;;  Copyright (C) 1988, 1994, 1996, 1999 Free Software Foundation, Inc.
+;;  Copyright (C) 1988, 1994, 1996, 1998, 1999 Free Software Foundation, Inc.
 ;;  Contributed by Michael Tiemann (tiemann@cygnus.com)
 
 ;; This file is part of GNU CC.
@@ -221,7 +221,7 @@
       if (REG_P (operands[1]))
 	{
 	  rtx xoperands[2];
-	  xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+	  xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
 	  output_asm_insn (\"movd %1,tos\", xoperands);
 	  output_asm_insn (\"movd %1,tos\", operands);
 	  return \"movl tos,%0\";
@@ -233,7 +233,7 @@
       if (REG_P (operands[0]))
 	{
 	  output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands);
-	  operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+	  operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
 	  return \"movd tos,%0\";
 	}
       else
@@ -277,7 +277,7 @@
       convrt.i[1] = CONST_DOUBLE_HIGH (operands[1]);
       convrt.f = convrt.d;
 
-      /* Is there a better machine-independent way to do this?  */
+      /* Is there a better machine-independent way to to this?  */
       operands[1] = GEN_INT (convrt.i[0]);
       return \"movd %1,%0\";
     }
@@ -304,7 +304,7 @@
       if (REG_P (operands[1]))
 	{
 	  rtx xoperands[2];
-	  xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+	  xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
 	  output_asm_insn (\"movd %1,tos\", xoperands);
 	  output_asm_insn (\"movd %1,tos\", operands);
 	  return \"movl tos,%0\";
@@ -316,7 +316,7 @@
       if (REG_P (operands[0]))
 	{
 	  output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands);
-	  operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+	  operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
 	  return \"movd tos,%0\";
 	}
       else
@@ -357,8 +357,7 @@
       && REGNO (operands[0]) == FRAME_POINTER_REGNUM)
     return \"lprd fp,%1\";
   if (GET_CODE (operands[1]) == CONST_DOUBLE)
-    operands[1]
-      = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
+    operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
   if (GET_CODE (operands[1]) == CONST_INT)
     {
       int i = INTVAL (operands[1]);
@@ -437,8 +436,7 @@
       if (i <= 7 && i >= -8)
 	{
 	  if (INTVAL (operands[1]) > 7)
-	    operands[1] =
-	      GEN_INT (i);
+	    operands[1] = GEN_INT (i);
 	  return \"movqw %1,%0\";
 	}
 	return \"movw %1,%0\";
@@ -483,8 +481,7 @@
       if (char_val <= 7 && char_val >= -8)
 	{
 	  if (INTVAL (operands[1]) > 7)
-	    operands[1] =
-	      GEN_INT (char_val);
+	    operands[1] = GEN_INT (char_val);
 	  return \"movqb %1,%0\";
 	}
 	return \"movb %1,%0\";
@@ -1784,7 +1781,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1809,7 +1806,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1834,7 +1831,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1862,7 +1859,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1887,7 +1884,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1912,7 +1909,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1962,7 +1959,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -1987,7 +1984,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""
@@ -2012,7 +2009,7 @@
   "
 {
   if (GET_CODE (operands[2]) != CONST_INT)
-    operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
+    operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
 }")
 
 (define_insn ""