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author | Jozef Lawrynowicz <jozefl@gcc.gnu.org> | 2019-10-07 21:22:04 +0000 |
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committer | Jozef Lawrynowicz <jozefl@gcc.gnu.org> | 2019-10-07 21:22:04 +0000 |
commit | cac52161c501abb93ded17a8f41b4a6310dbdab0 (patch) | |
tree | 7326f49dbe32842f47e93a6bb38ca358a6293717 /gcc/config/msp430 | |
parent | 795fe3d2c663337d8a1ae1347db172d54fd96c12 (diff) | |
download | gcc-cac52161c501abb93ded17a8f41b4a6310dbdab0.zip gcc-cac52161c501abb93ded17a8f41b4a6310dbdab0.tar.gz gcc-cac52161c501abb93ded17a8f41b4a6310dbdab0.tar.bz2 |
Revert: 2019-10-07 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.md: Revert: Group zero_extend* insns together.
From-SVN: r276680
Diffstat (limited to 'gcc/config/msp430')
-rw-r--r-- | gcc/config/msp430/msp430.md | 117 |
1 files changed, 59 insertions, 58 deletions
diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index 5bca727..ebd9c85 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -559,11 +559,15 @@ AND%X0\t#0xff, %0" ) -(define_insn "zero_extendqisi2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r") - (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "rm")))] - "" - "MOV%X1.B\t%1,%L0 { CLR\t%H0" +;; Eliminate extraneous zero-extends mysteriously created by gcc. +(define_peephole2 + [(set (match_operand:HI 0 "register_operand") + (zero_extend:HI (match_operand:QI 1 "general_operand"))) + (set (match_operand:HI 2 "register_operand") + (zero_extend:HI (match_operand:QI 3 "register_operand")))] + "REGNO (operands[0]) == REGNO (operands[2]) && REGNO (operands[2]) == REGNO (operands[3])" + [(set (match_dup 0) + (zero_extend:HI (match_dup 1)))] ) (define_insn "zero_extendhipsi2" @@ -574,6 +578,40 @@ MOVX\t%1, %0 MOVX.A\t%1, %0" ) + +(define_insn "truncpsihi2" + [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rm") + (truncate:HI (match_operand:PSI 1 "register_operand" "r")))] + "" + "MOVX\t%1, %0" +) + +(define_insn "extendhisi2" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r") + (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r")))] + "" + { return msp430x_extendhisi (operands); } +) + +(define_insn "extendhipsi2" + [(set (match_operand:PSI 0 "nonimmediate_operand" "=r") + (subreg:PSI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) 0))] + "msp430x" + "RLAM.A #4, %0 { RRAM.A #4, %0" +) + +;; Look for cases where integer/pointer conversions are suboptimal due +;; to missing patterns, despite us not having opcodes for these +;; patterns. Doing these manually allows for alternate optimization +;; paths. + +(define_insn "zero_extendqisi2" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r") + (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "rm")))] + "" + "MOV%X1.B\t%1,%L0 { CLR\t%H0" +) + (define_insn "zero_extendhisi2" [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,r")))] @@ -592,6 +630,22 @@ MOV.W\t%1,%0" ) +(define_insn "extend_and_shift1_hipsi2" + [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0) + (ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) + (const_int 1)))] + "msp430x" + "RLAM.A #4, %0 { RRAM.A #3, %0" +) + +(define_insn "extend_and_shift2_hipsi2" + [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0) + (ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) + (const_int 2)))] + "msp430x" + "RLAM.A #4, %0 { RRAM.A #2, %0" +) + ; Nasty - we are sign-extending a 20-bit PSI value in one register into ; two adjacent 16-bit registers to make an SI value. There is no MSP430X ; instruction that will do this, so we push the 20-bit value onto the stack @@ -626,59 +680,6 @@ " ) -;; Eliminate extraneous zero-extends mysteriously created by gcc. -(define_peephole2 - [(set (match_operand:HI 0 "register_operand") - (zero_extend:HI (match_operand:QI 1 "general_operand"))) - (set (match_operand:HI 2 "register_operand") - (zero_extend:HI (match_operand:QI 3 "register_operand")))] - "REGNO (operands[0]) == REGNO (operands[2]) && REGNO (operands[2]) == REGNO (operands[3])" - [(set (match_dup 0) - (zero_extend:HI (match_dup 1)))] -) - -(define_insn "truncpsihi2" - [(set (match_operand:HI 0 "msp430_nonimmediate_operand" "=rm") - (truncate:HI (match_operand:PSI 1 "register_operand" "r")))] - "" - "MOVX\t%1, %0" -) - -(define_insn "extendhisi2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r") - (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r")))] - "" - { return msp430x_extendhisi (operands); } -) - -(define_insn "extendhipsi2" - [(set (match_operand:PSI 0 "nonimmediate_operand" "=r") - (subreg:PSI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) 0))] - "msp430x" - "RLAM.A #4, %0 { RRAM.A #4, %0" -) - -;; Look for cases where integer/pointer conversions are suboptimal due -;; to missing patterns, despite us not having opcodes for these -;; patterns. Doing these manually allows for alternate optimization -;; paths. - -(define_insn "extend_and_shift1_hipsi2" - [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0) - (ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) - (const_int 1)))] - "msp430x" - "RLAM.A #4, %0 { RRAM.A #3, %0" -) - -(define_insn "extend_and_shift2_hipsi2" - [(set (subreg:SI (match_operand:PSI 0 "nonimmediate_operand" "=r") 0) - (ashift:SI (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")) - (const_int 2)))] - "msp430x" - "RLAM.A #4, %0 { RRAM.A #2, %0" -) - ;; We also need to be able to sign-extend pointer types (eg ptrdiff_t). ;; Since (we assume) pushing a 20-bit value onto the stack zero-extends ;; it, we use a different method here. |