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authorAdam Nemet <anemet@caviumnetworks.com>2009-05-17 07:31:25 +0000
committerAdam Nemet <nemet@gcc.gnu.org>2009-05-17 07:31:25 +0000
commitef67af22cb43478cf1ee1693f79d9262c933a13e (patch)
treea347e5a4ccc0c89b83f082342fa90d9c48aa3f43 /gcc/config/mips
parent51fe63ef9a849e72301090aa7ff854232049c50f (diff)
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* config/mips/mips.md (*zero_extend<mode>_trunchi,
*zero_extend<mode>_truncqi): Merge these into ... (*zero_extend<GPR:mode>_trunc<SHORT:mode>): ... this new pattern. Name the pattern following this as *zero_extendhi_truncqi. From-SVN: r147630
Diffstat (limited to 'gcc/config/mips')
-rw-r--r--gcc/config/mips/mips.md22
1 files changed, 8 insertions, 14 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 78539cb..4ae724a 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2778,25 +2778,19 @@
;; Combiner patterns to optimize truncate/zero_extend combinations.
-(define_insn "*zero_extend<mode>_trunchi"
+(define_insn "*zero_extend<GPR:mode>_trunc<SHORT:mode>"
[(set (match_operand:GPR 0 "register_operand" "=d")
(zero_extend:GPR
- (truncate:HI (match_operand:DI 1 "register_operand" "d"))))]
- "TARGET_64BIT && !TARGET_MIPS16"
- "andi\t%0,%1,0xffff"
- [(set_attr "type" "logical")
- (set_attr "mode" "<MODE>")])
-
-(define_insn "*zero_extend<mode>_truncqi"
- [(set (match_operand:GPR 0 "register_operand" "=d")
- (zero_extend:GPR
- (truncate:QI (match_operand:DI 1 "register_operand" "d"))))]
+ (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))]
"TARGET_64BIT && !TARGET_MIPS16"
- "andi\t%0,%1,0xff"
+{
+ operands[2] = GEN_INT (GET_MODE_MASK (<SHORT:MODE>mode));
+ return "andi\t%0,%1,%x2";
+}
[(set_attr "type" "logical")
- (set_attr "mode" "<MODE>")])
+ (set_attr "mode" "<GPR:MODE>")])
-(define_insn ""
+(define_insn "*zero_extendhi_truncqi"
[(set (match_operand:HI 0 "register_operand" "=d")
(zero_extend:HI
(truncate:QI (match_operand:DI 1 "register_operand" "d"))))]