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| author | YunQiang Su <yunqiang.su@cipunited.com> | 2021-02-25 19:55:10 -0700 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 2021-02-25 19:56:07 -0700 |
| commit | 9967bbfceddce755b18bdbecc6d0c56e994a05cc (patch) | |
| tree | 3d3f9822acc9a47c34cb4e24717702d06e381c81 /gcc/config/mips | |
| parent | 97989a2220c876113ccdfcad5ed247c8efbe1cf0 (diff) | |
| download | gcc-9967bbfceddce755b18bdbecc6d0c56e994a05cc.zip gcc-9967bbfceddce755b18bdbecc6d0c56e994a05cc.tar.gz gcc-9967bbfceddce755b18bdbecc6d0c56e994a05cc.tar.bz2 | |
[PATCH v4 1/2] MIPS: unaligned load: use SImode for SUBREG if OK (PR98996) [PATCH v4 2/2] ada: add 128bit operation for MIPS N32 and N64
gcc/ChangeLog:
PR target/98996
* config/mips/mips.c (mips_expand_ext_as_unaligned_load):
If TARGET_64BIT and dest is SUBREG, we check the width, if it
equal to SImode, we use SImode operation, just like what we are
doing for REG one.
gcc/ada/ChangeLog:
PR ada/98996
* Makefile.rtl: <mips*-*-linux*>
add 128Bit operation file for MIPS N64 and N32 to
LIBGNAT_TARGET_PAIRS and EXTRA_GNATRTL_NONTASKING_OBJS
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 8bd2d29..3155459 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8400,7 +8400,7 @@ mips_expand_ext_as_unaligned_load (rtx dest, rtx src, HOST_WIDE_INT width, /* If TARGET_64BIT, the destination of a 32-bit "extz" or "extzv" will be a DImode, create a new temp and emit a zero extend at the end. */ if (GET_MODE (dest) == DImode - && REG_P (dest) + && (REG_P (dest) || (SUBREG_P (dest) && !MEM_P (SUBREG_REG (dest)))) && GET_MODE_BITSIZE (SImode) == width) { dest1 = dest; |