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author | Eric Christopher <echristo@gcc.gnu.org> | 2004-11-16 19:24:17 +0000 |
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committer | Eric Christopher <echristo@gcc.gnu.org> | 2004-11-16 19:24:17 +0000 |
commit | 66083422fdff0478bebd65b4bf2d103a55d97366 (patch) | |
tree | 77e9d1dd57414da5d7b4e6d4d390f5a811c162ec /gcc/config/mips/mips.md | |
parent | 96e1fc281c045a99c58fcfc205c1e3f5efad1b2b (diff) | |
download | gcc-66083422fdff0478bebd65b4bf2d103a55d97366.zip gcc-66083422fdff0478bebd65b4bf2d103a55d97366.tar.gz gcc-66083422fdff0478bebd65b4bf2d103a55d97366.tar.bz2 |
mips.c: Use rtl _P predicates.
2004-11-16 Eric Christopher <echristo@redhat.com>
* config/mips/mips.c: Use rtl _P predicates.
* config/mips/mips.h: Ditto.
* config/mips/mips.md: Ditto.
From-SVN: r90752
Diffstat (limited to 'gcc/config/mips/mips.md')
-rw-r--r-- | gcc/config/mips/mips.md | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 3bcc72a..ba99796 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -632,7 +632,7 @@ (plus:SI (match_dup 0) (match_operand:SI 1 "const_int_operand")))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) > 0x7f @@ -661,9 +661,9 @@ (plus:SI (match_operand:SI 1 "register_operand") (match_operand:SI 2 "const_int_operand")))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG + && REG_P (operands[1]) && M16_REG_P (REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1]) && GET_CODE (operands[2]) == CONST_INT @@ -693,7 +693,7 @@ (plus:DI (match_dup 0) (match_operand:DI 1 "const_int_operand")))] "TARGET_MIPS16 && TARGET_64BIT && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) > 0xf @@ -722,9 +722,9 @@ (plus:DI (match_operand:DI 1 "register_operand") (match_operand:DI 2 "const_int_operand")))] "TARGET_MIPS16 && TARGET_64BIT && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG + && REG_P (operands[1]) && M16_REG_P (REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1]) && GET_CODE (operands[2]) == CONST_INT @@ -3145,7 +3145,7 @@ beq\t%2,%.,1b\;\ (match_operand:DI 1 "const_int_operand"))))] "TARGET_64BIT && TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) < 0 @@ -3239,7 +3239,7 @@ beq\t%2,%.,1b\;\ (mem:SI (plus:SI (match_dup 0) (match_operand:SI 1 "const_int_operand"))))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) < 0 @@ -3280,7 +3280,7 @@ beq\t%2,%.,1b\;\ [(set (match_operand:SI 0 "register_operand") (match_operand:SI 1 "const_int_operand"))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= 0x100 @@ -3447,7 +3447,7 @@ beq\t%2,%.,1b\;\ (mem:HI (plus:SI (match_dup 0) (match_operand:SI 1 "const_int_operand"))))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) < 0 @@ -3542,7 +3542,7 @@ beq\t%2,%.,1b\;\ (mem:QI (plus:SI (match_dup 0) (match_operand:SI 1 "const_int_operand"))))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE - && GET_CODE (operands[0]) == REG + && REG_P (operands[0]) && M16_REG_P (REGNO (operands[0])) && GET_CODE (operands[1]) == CONST_INT && ((INTVAL (operands[1]) < 0 |