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authorChenghua Xu <paul.hua.gm@gmail.com>2018-11-07 10:29:52 +0000
committerChenghua Xu <paulhua@gcc.gnu.org>2018-11-07 10:29:52 +0000
commitf70b5dbfa111f03dd31a3e3bd2e3d01eecdc06c3 (patch)
tree71e071c212eb4cc74475e0c99366ed9ea8f8b47f /gcc/config/mips/mips.h
parent36b56cd336f50d1565ecc4c5b1fed89151392baf (diff)
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Fix some typo and brain twister logical.
gcc/ * config/mips/mips.c: Fix typo in documentation of mips_loongson_ext2_prefetch_cookie. (mips_option_override): fix brain twister logical. * config/mips/mips.h: Fix typo in documentation of ISA_HAS_CTZ_CTO and define pattern. * config/mips/mips.md (prefetch): Hoist EXT2 above the 2EF/EXT block. (prefetch_indexed): Hoist EXT2 above the EXT block. gcc/testsuite/ * gcc.target/mips/loongson-ctz.c: Fix typo. * gcc.target/mips/loongson-dctz.c: Fix typo. From-SVN: r265871
Diffstat (limited to 'gcc/config/mips/mips.h')
-rw-r--r--gcc/config/mips/mips.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 0a92cf6..11ca364 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1158,7 +1158,7 @@ struct mips_cpu_info {
/* ISA has count leading zeroes/ones instruction (not implemented). */
#define ISA_HAS_CLZ_CLO (mips_isa_rev >= 1 && !TARGET_MIPS16)
-/* ISA has count tailing zeroes/ones instruction. */
+/* ISA has count trailing zeroes/ones instruction. */
#define ISA_HAS_CTZ_CTO (TARGET_LOONGSON_EXT2)
/* ISA has three operand multiply instructions that put