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| author | Eric Christopher <echristo@redhat.com> | 2002-06-12 23:26:44 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gcc.gnu.org> | 2002-06-12 23:26:44 +0000 |
| commit | 12bf26b6602a3365dee092f62bc4abe36df59957 (patch) | |
| tree | c8af9c2da4eb8eb753214caa4091eeea0d6a1e37 /gcc/config/mips/mips.h | |
| parent | 74826b0f9f0c336858dd2d07c01c63fd17ccd437 (diff) | |
| download | gcc-12bf26b6602a3365dee092f62bc4abe36df59957.zip gcc-12bf26b6602a3365dee092f62bc4abe36df59957.tar.gz gcc-12bf26b6602a3365dee092f62bc4abe36df59957.tar.bz2 | |
2002-06-12 Eric Christopher <echristo@redhat.com>
From Chris Demetriou <cgd@broadcom.com>
* config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix
comment.
(ISA_HAS_MADD_MSUB): Ditto.
(ISA_HAS_NMADD_NMSUB): Ditto.
From-SVN: r54569
Diffstat (limited to 'gcc/config/mips/mips.h')
| -rw-r--r-- | gcc/config/mips/mips.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index b68840f..7778361 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -751,22 +751,24 @@ extern void sbss_section PARAMS ((void)); || ISA_MIPS64) /* This is a catch all for the other new mips4 instructions: indexed load and - indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub instructions, - and the FP recip and recip sqrt instructions */ -#define ISA_HAS_FP4 (ISA_MIPS4 \ + indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub + instructions, and the FP recip and recip sqrt instructions */ +#define ISA_HAS_FP4 ((ISA_MIPS4 \ + || ISA_MIPS64) \ && !TARGET_MIPS16) /* ISA has conditional trap instructions. */ #define ISA_HAS_COND_TRAP (!ISA_MIPS1 \ && !TARGET_MIPS16) -/* ISA has multiply-accumulate instructions, madd and msub. */ +/* ISA has integer multiply-accumulate instructions, madd and msub. */ #define ISA_HAS_MADD_MSUB ((ISA_MIPS32 \ || ISA_MIPS64 \ ) && !TARGET_MIPS16) -/* ISA has nmadd and nmsub instructions. */ -#define ISA_HAS_NMADD_NMSUB (ISA_MIPS4 \ +/* ISA has floating-point nmadd and nmsub instructions. */ +#define ISA_HAS_NMADD_NMSUB ((ISA_MIPS4 \ + || ISA_MIPS64) \ && ! TARGET_MIPS16) /* ISA has count leading zeroes/ones instruction (not implemented). */ |