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author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-11-07 08:42:59 +0000 |
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committer | Chenghua Xu <paulhua@gcc.gnu.org> | 2018-11-07 08:42:59 +0000 |
commit | d6319811c1af2f2a36a83d2079eb986154060e60 (patch) | |
tree | 3f722255f7e301897a38a5bbf0aa031b62f652fc /gcc/config/mips/mips.c | |
parent | 375899d9e47d03f3f2fe6aa6c854ddc855f94d76 (diff) | |
download | gcc-d6319811c1af2f2a36a83d2079eb986154060e60.zip gcc-d6319811c1af2f2a36a83d2079eb986154060e60.tar.gz gcc-d6319811c1af2f2a36a83d2079eb986154060e60.tar.bz2 |
Add support for Loongson EXT2 instructions.
gcc/
* config/mips/mips-protos.h
(mips_loongson_ext2_prefetch_cookie): New prototype.
* config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): New.
(mips_option_override): Enable TARGET_LOONGSON_EXT when
TARGET_LOONGSON_EXT2 is true.
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
__mips_loongson_ext2, __mips_loongson_ext_rev=2.
(ISA_HAS_CTZ_CTO): New, true if TARGET_LOONGSON_EXT2.
(ISA_HAS_PREFETCH): Include TARGET_LOONGSON_EXT and
TARGET_LOONGSON_EXT2.
(ASM_SPEC): Add mloongson-ext2 and mno-loongson-ext2.
(define_insn "ctz<mode>2"): New insn pattern.
(define_insn "prefetch"): Include TARGET_LOONGSON_EXT2.
(define_insn "prefetch_indexed_<mode>"): Include
TARGET_LOONGSON_EXT and TARGET_LOONGSON_EXT2.
* config/mips/mips.opt (-mloongson-ext2): Add option.
* gcc/doc/invoke.texi (-mloongson-ext2): Document.
gcc/testsuite/
* gcc.target/mips/loongson-ctz.c: New test.
* gcc.target/mips/loongson-dctz.c: Likewise.
* gcc.target/mips/mips.exp (mips_option_groups): Add
-mloongson-ext2 option.
From-SVN: r265864
Diffstat (limited to 'gcc/config/mips/mips.c')
-rw-r--r-- | gcc/config/mips/mips.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index b579c3c..1c20750 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -15142,6 +15142,22 @@ mips_prefetch_cookie (rtx write, rtx locality) /* store_retained / load_retained. */ return GEN_INT (INTVAL (write) + 6); } + +/* Loongson EXT2 only implements perf hint=0 (prefetch for load) and hint=1 + (prefetch for store), other hint just scale to hint = 0 and hint = 1. */ + +rtx +mips_loongson_ext2_prefetch_cookie (rtx write, rtx locality) +{ + /* store. */ + if (INTVAL (write) == 1) + return GEN_INT (INTVAL (write)); + + /* load. */ + if (INTVAL (write) == 0) + return GEN_INT (INTVAL (write)); +} + /* Flags that indicate when a built-in function is available. @@ -20171,6 +20187,18 @@ mips_option_override (void) if (TARGET_LOONGSON_MMI && !TARGET_HARD_FLOAT_ABI) error ("%<-mloongson-mmi%> must be used with %<-mhard-float%>"); + /* If TARGET_LOONGSON_EXT2, enable TARGET_LOONGSON_EXT. */ + if (TARGET_LOONGSON_EXT2) + { + /* Make sure that when TARGET_LOONGSON_EXT2 is true, TARGET_LOONGSON_EXT + is true. If a user explicitly says -mloongson-ext2 -mno-loongson-ext + then that is an error. */ + if (!TARGET_LOONGSON_EXT + && !((target_flags_explicit & MASK_LOONGSON_EXT) == 0)) + error ("%<-mloongson-ext2%> must be used with %<-mloongson-ext%>"); + target_flags |= MASK_LOONGSON_EXT; + } + /* .eh_frame addresses should be the same width as a C pointer. Most MIPS ABIs support only one pointer size, so the assembler will usually know exactly how big an .eh_frame address is. |