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authorMichael Meissner <meissner@gcc.gnu.org>1992-06-18 20:47:50 +0000
committerMichael Meissner <meissner@gcc.gnu.org>1992-06-18 20:47:50 +0000
commit4763b498568d51040743e338fb6fec3d6a042cbe (patch)
tree3cdecf39332241d3a5c42c0b4571430b33a0c003 /gcc/config/mips/mips.c
parent99cbc4b07a17e60aa730c33a2fcb0021db00afd1 (diff)
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(large_int): Rework, so that we don't get funny boundary conditions on systems with 64 bit integers.
(large_int): Rework, so that we don't get funny boundary conditions on systems with 64 bit integers. (mips_move_1word): Just use li to load constants that can be done with lui, instead of issuing the lui, since the GAS bug that generated two instructions has been fixed. (final_prescan_insn): Move the checking for filling the delay slots here from the FINAL_PRESCAN_INSN macro. From-SVN: r1216
Diffstat (limited to 'gcc/config/mips/mips.c')
-rw-r--r--gcc/config/mips/mips.c29
1 files changed, 6 insertions, 23 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 08a6129..e911ca8 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -426,35 +426,18 @@ large_int (op, mode)
return FALSE;
value = INTVAL (op);
- if ((value & 0xffff0000) == 0) /* ior reg,$r0,value */
+ if ((value & ~0x0000ffff) == 0) /* ior reg,$r0,value */
return FALSE;
- if ((value & 0xffff0000) == 0xffff0000) /* subu reg,$r0,value */
+ if (((unsigned long)(value + 32768)) <= 32767) /* subu reg,$r0,value */
return FALSE;
- if ((value & 0x0000ffff) == 0) /* lui reg,value>>16 */
+ if ((value & 0xffff0000) == value) /* lui reg,value>>16 */
return FALSE;
return TRUE;
}
-/* Return truth value of whether OP is an integer which can be loaded
- with an lui instruction. */
-
-int
-lui_int (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- if (GET_CODE (op) != CONST_INT)
- return FALSE;
-
- if ((INTVAL (op) & 0x0000ffff) == 0) /* lui reg,value>>16 */
- return TRUE;
-
- return FALSE;
-}
-
/* Return truth value of whether OP is a register or the constant 0. */
int
@@ -1066,7 +1049,7 @@ mips_move_1word (operands, insn, unsignedp)
}
else if (GP_REG_P (regno0))
- ret = "li\t%0,%X1\t\t# %1";
+ ret = (INTVAL (op1) < 0) ? "li\t%0,%1\t\t# %X1" : "li\t%0,%X1\t\t# %1";
}
else if (code1 == CONST_DOUBLE && mode == SFmode)
@@ -4158,10 +4141,10 @@ function_prologue (file, size)
if (frame_pointer_needed)
{
if (tsize <= 32767)
- fprintf (file, "\taddu\t%s,%s,%d\t# set up frame pointer\n", fp_str, sp_str, tsize);
+ fprintf (file, "\taddu\t%s,%s,%d\t\t# set up frame pointer\n", fp_str, sp_str, tsize);
else
- fprintf (file, "\taddu\t%s,%s,%s\t# set up frame pointer\n", fp_str, sp_str,
+ fprintf (file, "\taddu\t%s,%s,%s\t\t# set up frame pointer\n", fp_str, sp_str,
reg_names[MIPS_TEMP1_REGNUM]);
}
}