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authorKazu Hirata <kazu@cs.umass.edu>2002-12-20 04:30:57 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2002-12-20 04:30:57 +0000
commit5bdc58781b801d4ec1cf6c9971d7e95bf3d2d26c (patch)
tree3d9985378bce8d2d63ec4a58cc8e57ab1acf6650 /gcc/config/mcore
parent539dbd15f3e90c346a11bea734b069e93dd14a55 (diff)
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c-pretty-print.h: Fix comment typos.
* c-pretty-print.h: Fix comment typos. * integrate.c: Likewise. * varasm.c: Likewise. * config/c4x/c4x.h: Likewise. * config/c4x/c4x.md: Likewise. * config/fr30/fr30.md: Likewise. * config/frv/frv.c: Likewise. * config/h8300/h8300.c: Likewise. * config/i386/i386.c: Likewise. * config/i386/i386.h: Likewise. * config/ia64/ia64.c: Likewise. * config/ia64/ia64.h: Likewise. * config/ip2k/ip2k.md: Likewise. * config/m68hc11/m68hc11-crt0.S: Likewise. * config/m68hc11/m68hc11.h: Likewise. * config/m68hc11/m68hc11.md: Likewise. * config/m68hc11/m68hc12.h: Likewise. * config/mcore/mcore.md: Likewise. * config/mips/mips.c: Likewise. * config/mips/mips.md: Likewise. * config/mmix/mmix-modes.def: Likewise. * config/pa/pa.c: Likewise. * config/rs6000/rs6000.c: Likewise. * config/rs6000/rs6000.h: Likewise. * config/rs6000/rs6000.md: Likewise. From-SVN: r60354
Diffstat (limited to 'gcc/config/mcore')
-rw-r--r--gcc/config/mcore/mcore.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md
index fe71e37..dd1c614 100644
--- a/gcc/config/mcore/mcore.md
+++ b/gcc/config/mcore/mcore.md
@@ -150,7 +150,7 @@
;; ; This is done to allow bit field masks to fold together in combine.
;; ; The reload phase will force the immediate into a register at the
;; ; very end. This helps in some cases, but hurts in others: we'd
-;; ; really like to cse these immediates. However, there is an phase
+;; ; really like to cse these immediates. However, there is a phase
;; ; ordering problem here. cse picks up individual masks and cse's
;; ; those, but not folded masks (cse happens before combine). It's
;; ; not clear what the best solution is because we really want cse