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| author | Stephane Carrez <Stephane.Carrez@worldnet.fr> | 2001-05-04 22:55:27 +0200 |
|---|---|---|
| committer | Stephane Carrez <ciceron@gcc.gnu.org> | 2001-05-04 22:55:27 +0200 |
| commit | c5c2ca16770716668d1bfce4e1774a469b2dcf76 (patch) | |
| tree | 028dbacd308234d9a958c3335ae83ae43158ddb6 /gcc/config/m68hc11/larith.asm | |
| parent | 62aa6b06ab84a91b187758de59df695238b400d8 (diff) | |
| download | gcc-c5c2ca16770716668d1bfce4e1774a469b2dcf76.zip gcc-c5c2ca16770716668d1bfce4e1774a469b2dcf76.tar.gz gcc-c5c2ca16770716668d1bfce4e1774a469b2dcf76.tar.bz2 | |
larith.asm (L_regs_frame): New for _.frame.
* config/m68hc11/larith.asm (L_regs_frame): New for _.frame.
Put the soft registers in bss for 68HC12.
(L_regs_d3_4): New for _.d3 and _.d4.
(L_regs_d5_6): Likewise.
(L_regs_d1_2): Likewise.
* config/m68hc11/t-m68hc11-gas (T_CPPFLAGS): Compile new parts.
From-SVN: r41846
Diffstat (limited to 'gcc/config/m68hc11/larith.asm')
| -rw-r--r-- | gcc/config/m68hc11/larith.asm | 51 |
1 files changed, 41 insertions, 10 deletions
diff --git a/gcc/config/m68hc11/larith.asm b/gcc/config/m68hc11/larith.asm index 07f09ea..e7b486c 100644 --- a/gcc/config/m68hc11/larith.asm +++ b/gcc/config/m68hc11/larith.asm @@ -52,38 +52,69 @@ NAME: .word 0; \ #else .sect .page0 #endif - .globl _.tmp,_.frame + .globl _.tmp .globl _.z,_.xy REG(_.tmp) REG(_.z) REG(_.xy) -REG(_.frame) #endif -#ifdef L_regs_d1_8 -/* Pseudo hard registers used by gcc. - They must be located in page0. - They will normally appear at the end of .page0 section. */ +#ifdef L_regs_frame #ifdef mc68hc12 .sect .bss #else .sect .page0 #endif - .globl _.d1,_.d2,_.d3,_.d4,_.d5,_.d6 - .globl _.d7,_.d8 + .globl _.frame +REG(_.frame) +#endif + +#ifdef L_regs_d1_2 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d1,_.d2 REG(_.d1) REG(_.d2) +#endif + +#ifdef L_regs_d3_4 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d3,_.d4 REG(_.d3) REG(_.d4) +#endif + +#ifdef L_regs_d5_6 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d5,_.d6 REG(_.d5) REG(_.d6) +#endif + +#ifdef L_regs_d7_8 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d7,_.d8 REG(_.d7) REG(_.d8) - #endif -#ifdef L_regs_d8_16 +#ifdef L_regs_d9_16 /* Pseudo hard registers used by gcc. They must be located in page0. They will normally appear at the end of .page0 section. */ |