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author | Georg-Johann Lay <avr@gjlay.de> | 2024-03-18 08:50:02 +0100 |
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committer | Georg-Johann Lay <avr@gjlay.de> | 2024-03-18 08:51:59 +0100 |
commit | 9361f19e081294b04e16ac2f6056b3b910f27ff4 (patch) | |
tree | f11a21c0e3a5f4c2bed2f76a3982b93875589f7f /gcc/config/m32c | |
parent | 58753dba800de14144785199fd710e9b00544155 (diff) | |
download | gcc-9361f19e081294b04e16ac2f6056b3b910f27ff4.zip gcc-9361f19e081294b04e16ac2f6056b3b910f27ff4.tar.gz gcc-9361f19e081294b04e16ac2f6056b3b910f27ff4.tar.bz2 |
avr.md - Tweak xor insn constraints.
xor insn can handle some more values without the requirement of a
scratch register. This patch adds a new constraint alternative for
such values. The output function avr_out_bitop already handles
these cases, so no change is needed there.
gcc/
* config/avr/constraints.md (CX2, CX3, CX4): New constraints.
* config/avr/avr-protos.h (avr_xor_noclobber_dconst): New proto.
* config/avr/avr.cc (avr_xor_noclobber_dconst): New function.
* config/avr/avr.md (xorhi3, *xorhi3): Add "d,0,CX2,X" alternative.
(xorpsi3, *xorpsi3): Add "d,0,CX3,X" alternative.
(xorsi3, *xorsi3): Add "d,0,CX4,X" alternative.
Diffstat (limited to 'gcc/config/m32c')
0 files changed, 0 insertions, 0 deletions