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authorDJ Delorie <dj@redhat.com>2010-09-28 18:01:54 -0400
committerDJ Delorie <dj@gcc.gnu.org>2010-09-28 18:01:54 -0400
commit146456c108b2c395c524f14d08b3c5d3af65e971 (patch)
tree75cbd5cf109db0254a9e603e1618f384ecd08374 /gcc/config/m32c/m32c.c
parent4e9ca9b0c8ad1cc353c70bb798fc5d2bc18f1013 (diff)
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re PR target/45800 ([M32C] compile error on increment volatile long var)
PR target/45800 * config/m32c/m32c.c (m32c_subreg): Force adjustment of subregs of volatile MEMs. From-SVN: r164705
Diffstat (limited to 'gcc/config/m32c/m32c.c')
-rw-r--r--gcc/config/m32c/m32c.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 066d1a8..d62b4f2 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -3317,7 +3317,19 @@ m32c_subreg (enum machine_mode outer,
return gen_rtx_MEM (outer, XEXP (XEXP (x, 0), 0));
if (GET_CODE (x) != REG)
- return simplify_gen_subreg (outer, x, inner, byte);
+ {
+ rtx r = simplify_gen_subreg (outer, x, inner, byte);
+ if (GET_CODE (r) == SUBREG
+ && GET_CODE (x) == MEM
+ && MEM_VOLATILE_P (x))
+ {
+ /* Volatile MEMs don't get simplified, but we need them to
+ be. We are little endian, so the subreg byte is the
+ offset. */
+ r = adjust_address (x, outer, byte);
+ }
+ return r;
+ }
r = REGNO (x);
if (r >= FIRST_PSEUDO_REGISTER || r == AP_REGNO)