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authorLulu Cheng <chenglulu@loongson.cn>2024-01-04 10:37:53 +0800
committerLulu Cheng <chenglulu@loongson.cn>2024-01-05 20:31:49 +0800
commit03c7df97e7ad46b8a78f6930ece7a0c02d1dd399 (patch)
tree36252d8def9cd2131a5416e48e940bf661fa492b /gcc/config/loongarch/lsx.md
parentf8e4412b047e4f075b628203fda84e2b4e6842cc (diff)
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LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction.
The [x]vld/[x]vst directive is defined as follows: [x]vld/[x]vst {x/v}d, rj, si12 When not modified, the immediate field of [x]vld/[x]vst is between 10 and 14 bits depending on the type. However, in loongarch_valid_offset_p, the immediate field is restricted first, so there is no error. However, in some cases redundant instructions will be generated, see test cases. Now modify it according to the description in the instruction manual. gcc/ChangeLog: * config/loongarch/lasx.md (lasx_mxld_<lasxfmt_f>): Modify the method of determining the memory offset of [x]vld/[x]vst. (lasx_mxst_<lasxfmt_f>): Likewise. * config/loongarch/loongarch.cc (loongarch_valid_offset_p): Delete. (loongarch_address_insns): Likewise. * config/loongarch/lsx.md (lsx_ld_<lsxfmt_f>): Likewise. (lsx_st_<lsxfmt_f>): Likewise. * config/loongarch/predicates.md (aq10b_operand): Likewise. (aq10h_operand): Likewise. (aq10w_operand): Likewise. (aq10d_operand): Likewise. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vect-ld-st-imm12.c: New test.
Diffstat (limited to 'gcc/config/loongarch/lsx.md')
-rw-r--r--gcc/config/loongarch/lsx.md26
1 files changed, 0 insertions, 26 deletions
diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md
index 76d33a3..91ce774 100644
--- a/gcc/config/loongarch/lsx.md
+++ b/gcc/config/loongarch/lsx.md
@@ -812,32 +812,6 @@
DONE;
})
-;; Offset load
-(define_expand "lsx_ld_<lsxfmt_f>"
- [(match_operand:LSX 0 "register_operand")
- (match_operand 1 "pmode_register_operand")
- (match_operand 2 "aq10<lsxfmt>_operand")]
- "ISA_HAS_LSX"
-{
- rtx addr = plus_constant (GET_MODE (operands[1]), operands[1],
- INTVAL (operands[2]));
- loongarch_emit_move (operands[0], gen_rtx_MEM (<MODE>mode, addr));
- DONE;
-})
-
-;; Offset store
-(define_expand "lsx_st_<lsxfmt_f>"
- [(match_operand:LSX 0 "register_operand")
- (match_operand 1 "pmode_register_operand")
- (match_operand 2 "aq10<lsxfmt>_operand")]
- "ISA_HAS_LSX"
-{
- rtx addr = plus_constant (GET_MODE (operands[1]), operands[1],
- INTVAL (operands[2]));
- loongarch_emit_move (gen_rtx_MEM (<MODE>mode, addr), operands[0]);
- DONE;
-})
-
;; Integer operations
(define_insn "add<mode>3"
[(set (match_operand:ILSX 0 "register_operand" "=f,f,f")