diff options
| author | Richard Henderson <rth@gcc.gnu.org> | 2005-01-22 14:49:06 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2005-01-22 14:49:06 -0800 |
| commit | 7ae4d8d4214508d400e28845b773e775ddbb7ac3 (patch) | |
| tree | 44a7d07f7a98f7ff87b2faa87658e1de80d69f42 /gcc/config/ia64/ia64.md | |
| parent | 190607885a2178612dcd3faefcb4a6e31d7c91cb (diff) | |
| download | gcc-7ae4d8d4214508d400e28845b773e775ddbb7ac3.zip gcc-7ae4d8d4214508d400e28845b773e775ddbb7ac3.tar.gz gcc-7ae4d8d4214508d400e28845b773e775ddbb7ac3.tar.bz2 | |
genopinit.c (optabs): Use smin/smax for floating point too.
* genopinit.c (optabs): Use smin/smax for floating point too.
* doc/md.texi: Update to match. Clarify that floating point
results are undefined for +0/-0 and NaN.
* doc/rtl.texi: Likewise.
* rtl.def (SMIN, SMAX): Likewise
* tree.def (MIN_EXPR, MAX_EXPR): Likewise.
* config/alpha/alpha.md (smaxdf3, smindf3, smaxsf3, sminsf3): Add
leading 's' to the name.
* config/ia64/ia64.md (smaxsf3, sminsf3, smaxdf3, smindf3,
smaxxf3, sminxf3): Likewise.
* config/rs6000/rs6000.md (smaxdf3, smindf3, smaxsf3, sminsf3):
Likewise.
From-SVN: r94083
Diffstat (limited to 'gcc/config/ia64/ia64.md')
| -rw-r--r-- | gcc/config/ia64/ia64.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 9331d90..90b1cc5 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -2586,7 +2586,7 @@ "fnegabs %0 = %1" [(set_attr "itanium_class" "fmisc")]) -(define_insn "minsf3" +(define_insn "sminsf3" [(set (match_operand:SF 0 "fr_register_operand" "=f") (smin:SF (match_operand:SF 1 "fr_register_operand" "f") (match_operand:SF 2 "fr_reg_or_fp01_operand" "fG")))] @@ -2594,7 +2594,7 @@ "fmin %0 = %1, %F2" [(set_attr "itanium_class" "fmisc")]) -(define_insn "maxsf3" +(define_insn "smaxsf3" [(set (match_operand:SF 0 "fr_register_operand" "=f") (smax:SF (match_operand:SF 1 "fr_register_operand" "f") (match_operand:SF 2 "fr_reg_or_fp01_operand" "fG")))] @@ -3000,7 +3000,7 @@ "fnegabs %0 = %1" [(set_attr "itanium_class" "fmisc")]) -(define_insn "mindf3" +(define_insn "smindf3" [(set (match_operand:DF 0 "fr_register_operand" "=f") (smin:DF (match_operand:DF 1 "fr_register_operand" "f") (match_operand:DF 2 "fr_reg_or_fp01_operand" "fG")))] @@ -3008,7 +3008,7 @@ "fmin %0 = %1, %F2" [(set_attr "itanium_class" "fmisc")]) -(define_insn "maxdf3" +(define_insn "smaxdf3" [(set (match_operand:DF 0 "fr_register_operand" "=f") (smax:DF (match_operand:DF 1 "fr_register_operand" "f") (match_operand:DF 2 "fr_reg_or_fp01_operand" "fG")))] @@ -3556,7 +3556,7 @@ "fnegabs %0 = %F1" [(set_attr "itanium_class" "fmisc")]) -(define_insn "minxf3" +(define_insn "sminxf3" [(set (match_operand:XF 0 "fr_register_operand" "=f") (smin:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG") (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))] @@ -3564,7 +3564,7 @@ "fmin %0 = %F1, %F2" [(set_attr "itanium_class" "fmisc")]) -(define_insn "maxxf3" +(define_insn "smaxxf3" [(set (match_operand:XF 0 "fr_register_operand" "=f") (smax:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG") (match_operand:XF 2 "xfreg_or_fp01_operand" "fG")))] |