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| author | Steve Ellcey <sje@cup.hp.com> | 2009-04-24 19:35:52 +0000 |
|---|---|---|
| committer | Steve Ellcey <sje@gcc.gnu.org> | 2009-04-24 19:35:52 +0000 |
| commit | 735b94a740d585af15678732b069ca905ef6e78a (patch) | |
| tree | 0796ed723c2f7b1a394b48dce41cc2f29e25868b /gcc/config/ia64/ia64.md | |
| parent | 77a302647e6de91919e0e9c8c2383326715e4eee (diff) | |
| download | gcc-735b94a740d585af15678732b069ca905ef6e78a.zip gcc-735b94a740d585af15678732b069ca905ef6e78a.tar.gz gcc-735b94a740d585af15678732b069ca905ef6e78a.tar.bz2 | |
ia64.md (movfs_internal): Allow flt constants.
* config/ia64/ia64.md (movfs_internal): Allow flt constants.
(movdf_internal): Ditto.
* config/ia64/ia64.c (ia64_legitimate_constant_p): Allow
SFmode and DFmode constants.
(ia64_print_operand): Add 'G' format for printing
floating point constants.
From-SVN: r146743
Diffstat (limited to 'gcc/config/ia64/ia64.md')
| -rw-r--r-- | gcc/config/ia64/ia64.md | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 51a01e4..26e71f8 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -986,8 +986,8 @@ }) (define_insn "movsf_internal" - [(set (match_operand:SF 0 "destination_operand" "=f,f, Q,*r, f,*r,*r, m") - (match_operand:SF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] + [(set (match_operand:SF 0 "destination_operand" "=f,f, Q,*r, f,*r,*r, m,*r") + (match_operand:SF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r, F"))] "ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %F1 @@ -997,10 +997,11 @@ setf.s %0 = %1 mov %0 = %1 ld4%O1 %0 = %1%P1 - st4%Q0 %0 = %1%P0" - [(set_attr "itanium_class" "fmisc,fld,stf,frfr,tofr,ialu,ld,st") + st4%Q0 %0 = %1%P0 + movl %0 = %G1" + [(set_attr "itanium_class" "fmisc,fld,stf,frfr,tofr,ialu,ld,st,long_i") (set_attr "speculable1" "yes") - (set_attr "speculable2" "no, yes,no, no, no, no, yes,no")]) + (set_attr "speculable2" "no, yes,no, no, no, no, yes,no,no")]) (define_expand "movdf" [(set (match_operand:DF 0 "general_operand" "") @@ -1014,8 +1015,8 @@ }) (define_insn "movdf_internal" - [(set (match_operand:DF 0 "destination_operand" "=f,f, Q,*r, f,*r,*r, m") - (match_operand:DF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] + [(set (match_operand:DF 0 "destination_operand" "=f,f, Q,*r, f,*r,*r, m,*r") + (match_operand:DF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r, F"))] "ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %F1 @@ -1025,10 +1026,11 @@ setf.d %0 = %1 mov %0 = %1 ld8%O1 %0 = %1%P1 - st8%Q0 %0 = %1%P0" - [(set_attr "itanium_class" "fmisc,fld,stf,frfr,tofr,ialu,ld,st") + st8%Q0 %0 = %1%P0 + movl %0 = %G1" + [(set_attr "itanium_class" "fmisc,fld,stf,frfr,tofr,ialu,ld,st,long_i") (set_attr "speculable1" "yes") - (set_attr "speculable2" "no, yes,no, no, no, no, yes,no")]) + (set_attr "speculable2" "no, yes,no, no, no, no, yes,no,no")]) ;; With no offsettable memory references, we've got to have a scratch ;; around to play with the second word if the variable winds up in GRs. |