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| author | Robin Dapp <rdapp@ventanamicro.com> | 2024-11-05 14:47:07 +0100 |
|---|---|---|
| committer | Robin Dapp <rdapp@ventanamicro.com> | 2024-11-18 11:48:42 +0100 |
| commit | ebf30772415cfd3fa544fc7262b28b948591538f (patch) | |
| tree | 65be82c97f5087d6c2fd188efc550ca7c610d097 /gcc/config/i386 | |
| parent | 4a39addb4921ca1f7aa013835cd1351226e5e6b6 (diff) | |
| download | gcc-ebf30772415cfd3fa544fc7262b28b948591538f.zip gcc-ebf30772415cfd3fa544fc7262b28b948591538f.tar.gz gcc-ebf30772415cfd3fa544fc7262b28b948591538f.tar.bz2 | |
i386: Add zero maskload else operand.
gcc/ChangeLog:
* config/i386/sse.md (maskload<mode><sseintvecmodelower>):
Call maskload<mode>..._1.
(maskload<mode><sseintvecmodelower>_1): Rename.
Diffstat (limited to 'gcc/config/i386')
| -rw-r--r-- | gcc/config/i386/sse.md | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index efe32e5..72acd5b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -28650,7 +28650,7 @@ (set_attr "btver2_decode" "vector") (set_attr "mode" "<sseinsnmode>")]) -(define_expand "maskload<mode><sseintvecmodelower>" +(define_expand "maskload<mode><sseintvecmodelower>_1" [(set (match_operand:V48_128_256 0 "register_operand") (unspec:V48_128_256 [(match_operand:<sseintvecmode> 2 "register_operand") @@ -28658,13 +28658,28 @@ UNSPEC_MASKMOV))] "TARGET_AVX") +(define_expand "maskload<mode><sseintvecmodelower>" + [(set (match_operand:V48_128_256 0 "register_operand") + (unspec:V48_128_256 + [(match_operand:<sseintvecmode> 2 "register_operand") + (match_operand:V48_128_256 1 "memory_operand") + (match_operand:V48_128_256 3 "const0_operand")] + UNSPEC_MASKMOV))] + "TARGET_AVX" +{ + emit_insn (gen_maskload<mode><sseintvecmodelower>_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) + (define_expand "maskload<mode><avx512fmaskmodelower>" [(set (match_operand:V48_AVX512VL 0 "register_operand") (vec_merge:V48_AVX512VL (unspec:V48_AVX512VL [(match_operand:V48_AVX512VL 1 "memory_operand")] UNSPEC_MASKLOAD) - (match_dup 0) + (match_operand:V48_AVX512VL 3 "const0_operand") (match_operand:<avx512fmaskmode> 2 "register_operand")))] "TARGET_AVX512F") @@ -28674,7 +28689,7 @@ (unspec:VI12HFBF_AVX512VL [(match_operand:VI12HFBF_AVX512VL 1 "memory_operand")] UNSPEC_MASKLOAD) - (match_dup 0) + (match_operand:VI12HFBF_AVX512VL 3 "const0_operand") (match_operand:<avx512fmaskmode> 2 "register_operand")))] "TARGET_AVX512BW") |