Makefile.in (recog.o): Don't depend on resource.h.

	* Makefile.in (recog.o): Don't depend on resource.h.
	* recog.c: Don't include resource.h.
	(recog_last_allowed_insn): Remove.
	(recog_next_insn): Remove.
	(struct peep2_insn_data): New.
	(peep2_insn_data, peep2_current): New.
	(peep2_next_insn): New.
	(peep2_regno_dead_p, peep2_reg_dead_p): New.
	(peep2_find_free_register): New.
	(peephole2_optimize): Track life information by insn as we go.
	* recog.h: Update declarations.
	* resource.c (find_free_register, reg_dead_p): Remove.
	* resource.h: Remove their declarations.
	* toplev.c: Include hard-reg-set.h before recog.h.

	* genconfig.c (max_insns_per_peep2): New.
	(gen_peephole2): New.
	(main): Call it.
	* genemit.c (output_peephole2_scratches): Generate calls to
	peep2_find_free_register; adjust surrounding code.
	(main): Have insn-emit.c include hard-reg-set.h before recog.h.
	* genrecog.c (change_state): Don't track last_insn.
	(write_action): Write into *_pmatch_len before accepting.
	(write_tree): Adjust peephole2_insns and subroutines to match.

	* config/i386/i386.md (all peepholes): Use peep2_regno_dead_p.

From-SVN: r34208

1 files changed, 25 insertions, 20 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5696c26..cdadf5d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9591,10 +9591,11 @@
   [(match_scratch:SI 1 "r")
    (set (match_operand:SI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+  "! optimize_size
    && ! TARGET_USE_MOV0
-   && TARGET_SPLIT_LONG_MOVES"
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 1) (const_int 0))
 	      (clobber (reg:CC 17))])
    (set (match_dup 0) (match_dup 1))]
@@ -9604,10 +9605,11 @@
   [(match_scratch:HI 1 "r")
    (set (match_operand:HI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+  "! optimize_size
    && ! TARGET_USE_MOV0
-   && TARGET_SPLIT_LONG_MOVES"
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 2) (const_int 0))
 	      (clobber (reg:CC 17))])
    (set (match_dup 0) (match_dup 1))]
@@ -9617,10 +9619,11 @@
   [(match_scratch:QI 1 "q")
    (set (match_operand:QI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+  "! optimize_size
    && ! TARGET_USE_MOV0
-   && TARGET_SPLIT_LONG_MOVES"
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 2) (const_int 0))
 	      (clobber (reg:CC 17))])
    (set (match_dup 0) (match_dup 1))]
@@ -9630,8 +9633,9 @@
   [(match_scratch:SI 2 "r")
    (set (match_operand:SI 0 "memory_operand" "")
         (match_operand:SI 1 "immediate_operand" ""))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-  && TARGET_SPLIT_LONG_MOVES"
+  "! optimize_size
+   && get_attr_length (insn) >= ix86_cost->large_insn
+   && TARGET_SPLIT_LONG_MOVES"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -9675,14 +9679,14 @@
 ;; represented using a modRM byte.  The XOR replacement is long decoded,
 ;; so this split helps here as well.
 ;;
-;; Note: Can't do this as a regular split because reg_dead_p assumes
-;; resource info is live.
+;; Note: Can't do this as a regular split because we can't get proper
+;; lifetime information then.
 
 (define_peephole2
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
 	(not:SI (match_operand:SI 1 "nonimmediate_operand" "0")))]
   "!optimize_size
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_PENTIUM 
         && (GET_CODE (operands[0]) != MEM
             || !memory_displacement_operand (operands[0], SImode)))
@@ -9696,7 +9700,7 @@
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
 	(not:HI (match_operand:HI 1 "nonimmediate_operand" "0")))]
   "!optimize_size
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_PENTIUM 
         && (GET_CODE (operands[0]) != MEM
             || !memory_displacement_operand (operands[0], HImode)))
@@ -9710,7 +9714,7 @@
   [(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
 	(not:QI (match_operand:QI 1 "nonimmediate_operand" "0")))]
   "!optimize_size
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))
+   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_PENTIUM 
         && (GET_CODE (operands[0]) != MEM
             || !memory_displacement_operand (operands[0], QImode)))
@@ -9873,7 +9877,7 @@
     || GET_MODE (operands[0]) == HImode
     || GET_MODE (operands[0]) == SImode)
    && (! TARGET_USE_MOV0 || optimize_size)
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))"
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (const_int 0))
 	      (clobber (reg:CC 17))])]
   "operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]));")
@@ -9885,7 +9889,7 @@
   "(GET_MODE (operands[0]) == HImode
     || GET_MODE (operands[0]) == SImode)
    && (optimize_size || TARGET_PENTIUM)
-   && reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))"
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (const_int -1))
 	      (clobber (reg:CC 17))])]
   "operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]));")
@@ -9896,7 +9900,7 @@
   [(set (match_operand:SI 0 "register_operand" "")
   	(plus:SI (match_dup 0)
 		 (match_operand:SI 1 "nonmemory_operand" "")))]
-  "reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))"
+  "peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1)))
 	      (clobber (reg:CC 17))])]
   "")
@@ -9905,7 +9909,8 @@
   [(set (match_operand:SI 0 "register_operand" "")
   	(mult:SI (match_dup 0)
 		 (match_operand:SI 1 "immediate_operand" "")))]
-  "reg_dead_p (insn, gen_rtx_REG (CCmode, FLAGS_REG))"
+  "exact_log2 (INTVAL (operands[1])) >= 0
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))
 	      (clobber (reg:CC 17))])]
   "operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1])));")