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author | liuhongt <hongtao.liu@intel.com> | 2022-01-06 15:33:20 +0800 |
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committer | liuhongt <hongtao.liu@intel.com> | 2022-01-07 11:13:00 +0800 |
commit | 041cfa0ce44d4c207903d41e6eabccdab2dfa90b (patch) | |
tree | a5edd3acc28fc08068e0a269a3a844f2ab9d6750 /gcc/config/i386 | |
parent | 1f759dbdcddd5eae795da48f46edae274a431cbc (diff) | |
download | gcc-041cfa0ce44d4c207903d41e6eabccdab2dfa90b.zip gcc-041cfa0ce44d4c207903d41e6eabccdab2dfa90b.tar.gz gcc-041cfa0ce44d4c207903d41e6eabccdab2dfa90b.tar.bz2 |
Support commutative alternative for AVX512 vpcmpeq{b,w,d,q}
gcc/ChangeLog:
* config/i386/sse.md
(*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Extend to
UNSPEC_PCMP_UNSIGNED.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr103774.c: New test.
* gcc.target/i386/avx512bw-vpcmpequb-1.c: Adjust scan assembler
from vpcmpub to (?:vpcmpub|vpcmpeqb).
* gcc.target/i386/avx512bw-vpcmpequw-1.c: Ditto.
* gcc.target/i386/avx512bw-vpcmpub-1.c: Ditto.
* gcc.target/i386/avx512bw-vpcmpuw-1.c: Ditto.
* gcc.target/i386/avx512f-vpcmpequd-1.c: Ditto.
* gcc.target/i386/avx512f-vpcmpequq-1.c: Ditto.
* gcc.target/i386/avx512f-vpcmpud-1.c: Ditto.
* gcc.target/i386/avx512vl-vpcmpequd-1.c: Ditto.
* gcc.target/i386/avx512vl-vpcmpequq-1.c: Ditto.
* gcc.target/i386/avx512vl-vpcmpuq-1.c: Ditto.
Diffstat (limited to 'gcc/config/i386')
-rw-r--r-- | gcc/config/i386/sse.md | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6c1e94f..d8f3035 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3895,6 +3895,22 @@ UNSPEC_PCMP_ITER))] "operands[4] = GEN_INT (INTVAL (operands[3]) ^ 4);") +(define_insn "*<avx512>_eq<mode>3<mask_scalar_merge_name>_1" + [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k,k") + (unspec:<avx512fmaskmode> + [(match_operand:VI12_AVX512VL 1 "nonimm_or_0_operand" "%v,v") + (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "vm,C") + (const_int 0)] + UNSPEC_PCMP_ITER))] + "TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))" + "@ + vpcmpeq<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2} + vptestnm<ssemodesuffix>\t{%1, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %1}" + [(set_attr "type" "ssecmp") + (set_attr "prefix_extra" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "<sseinsnmode>")]) + (define_insn "<avx512>_ucmp<mode>3<mask_scalar_merge_name>" [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") (unspec:<avx512fmaskmode> @@ -3977,6 +3993,22 @@ (set_attr "prefix" "evex") (set_attr "mode" "<VI12_AVX512VL:sseinsnmode>")]) +(define_insn "*<avx512>_eq<mode>3<mask_scalar_merge_name>_1" + [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k,k") + (unspec:<avx512fmaskmode> + [(match_operand:VI48_AVX512VL 1 "nonimm_or_0_operand" "%v,v") + (match_operand:VI48_AVX512VL 2 "nonimm_or_0_operand" "vm,C") + (const_int 0)] + UNSPEC_PCMP_ITER))] + "TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))" + "@ + vpcmpeq<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2} + vptestnm<ssemodesuffix>\t{%1, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %1}" + [(set_attr "type" "ssecmp") + (set_attr "prefix_extra" "1") + (set_attr "prefix" "evex") + (set_attr "mode" "<sseinsnmode>")]) + (define_insn "<avx512>_ucmp<mode>3<mask_scalar_merge_name>" [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k") (unspec:<avx512fmaskmode> @@ -16248,38 +16280,6 @@ "TARGET_AVX512F" "ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);") -(define_insn "*<avx512>_eq<mode>3<mask_scalar_merge_name>_1" - [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k,k") - (unspec:<avx512fmaskmode> - [(match_operand:VI12_AVX512VL 1 "nonimm_or_0_operand" "%v,v") - (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "vm,C") - (const_int 0)] - UNSPEC_PCMP))] - "TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "@ - vpcmpeq<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2} - vptestnm<ssemodesuffix>\t{%1, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %1}" - [(set_attr "type" "ssecmp") - (set_attr "prefix_extra" "1") - (set_attr "prefix" "evex") - (set_attr "mode" "<sseinsnmode>")]) - -(define_insn "*<avx512>_eq<mode>3<mask_scalar_merge_name>_1" - [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k,k") - (unspec:<avx512fmaskmode> - [(match_operand:VI48_AVX512VL 1 "nonimm_or_0_operand" "%v,v") - (match_operand:VI48_AVX512VL 2 "nonimm_or_0_operand" "vm,C") - (const_int 0)] - UNSPEC_PCMP))] - "TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "@ - vpcmpeq<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2} - vptestnm<ssemodesuffix>\t{%1, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %1}" - [(set_attr "type" "ssecmp") - (set_attr "prefix_extra" "1") - (set_attr "prefix" "evex") - (set_attr "mode" "<sseinsnmode>")]) - (define_insn "*sse4_1_eqv2di3" [(set (match_operand:V2DI 0 "register_operand" "=Yr,*x,x") (eq:V2DI |