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author | Uros Bizjak <ubizjak@gmail.com> | 2007-05-21 17:40:01 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2007-05-21 17:40:01 +0200 |
commit | 32fe15ec71951cb18be7d3f90019147b55b8ee76 (patch) | |
tree | a22c19f63607dd1c196746d1021d2233ecf3bc14 /gcc/config/i386/xmmintrin.h | |
parent | c4ba884897fc5aa644f3d43990431e023ed618f4 (diff) | |
download | gcc-32fe15ec71951cb18be7d3f90019147b55b8ee76.zip gcc-32fe15ec71951cb18be7d3f90019147b55b8ee76.tar.gz gcc-32fe15ec71951cb18be7d3f90019147b55b8ee76.tar.bz2 |
tmmintrin.h (_mm_alignr_epi8): Provide macro implementation if __OPTIMIZE__ is not defined.
* config/i386/tmmintrin.h (_mm_alignr_epi8): Provide macro
implementation if __OPTIMIZE__ is not defined.
(_mm_alignr_pi8): Ditto.
* config/i386/ammintrin.h (_mm_extracti_si64): Ditto.
(_mm_inserti_si64): Ditto.
* config/i386/emmintrin.h (_mm_shuffle_pd): Ditto.
(_mm_slli_epi16): Ditto.
(_mm_slli_epi32): Ditto.
(_mm_slli_epi64): Ditto.
(_mm_srai_epi16): Ditto.
(_mm_srai_epi32): Ditto.
(_mm_srli_si128): Ditto.
(_mm_slli_si128): Ditto.
(_mm_srli_epi16): Ditto.
(_mm_srli_epi32): Ditto.
(_mm_srli_epi64): Ditto.
(_mm_extract_epi16): Ditto.
(_mm_insert_epi16): Ditto.
(_mm_shufflehi_epi16): Ditto.
(_mm_shufflelo_epi16): Ditto.
(_mm_shuffle_epi32): Ditto.
* config/i386/xmmintrin.h (_mm_extract_pi16): Ditto.
(_m_pextrw): Ditto.
(_mm_insert_pi16): Ditto.
(_m_pinsrw): Ditto.
(_mm_shuffle_pi16): Ditto.
(_m_pshufw): Ditto.
(_mm_shufle_ps): Ditto.
(_mm_prefetch): Ditto.
testsuite/ChangeLog:
* gcc.target/i386/sse-14.c: Remove all intrinsic redefines.
* gcc.target/i386/sse-12: Add -O to compile options.
* g++.dg/other/i386-2.C: Use "-march=k8 -m3dnow -mssse3
-msse4a" instead of "-msse3". Include only ammintrin.h, tmmintrin.h
and mm3dnow.h. Add -O to compile options.
From-SVN: r124904
Diffstat (limited to 'gcc/config/i386/xmmintrin.h')
-rw-r--r-- | gcc/config/i386/xmmintrin.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index 3716daa..b55474c 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -716,11 +716,16 @@ _mm_cvtps_pi8(__m128 __A) } /* Selects four specific SPFP values from A and B based on MASK. */ +#ifdef __OPTIMIZE__ static __inline __m128 __attribute__((__always_inline__)) _mm_shuffle_ps (__m128 __A, __m128 __B, int const __mask) { return (__m128) __builtin_ia32_shufps ((__v4sf)__A, (__v4sf)__B, __mask); } +#else +#define _mm_shuffle_ps(A, B, MASK) \ + ((__m128) __builtin_ia32_shufps ((__v4sf)(A), (__v4sf)(B), (MASK))) +#endif /* Selects and interleaves the upper two SPFP values from A and B. */ static __inline __m128 __attribute__((__always_inline__)) @@ -986,6 +991,7 @@ _mm_move_ss (__m128 __A, __m128 __B) } /* Extracts one of the four words of A. The selector N must be immediate. */ +#ifdef __OPTIMIZE__ static __inline int __attribute__((__always_inline__)) _mm_extract_pi16 (__m64 const __A, int const __N) { @@ -997,9 +1003,14 @@ _m_pextrw (__m64 const __A, int const __N) { return _mm_extract_pi16 (__A, __N); } +#else +#define _mm_extract_pi16(A, N) __builtin_ia32_vec_ext_v4hi ((__v4hi)(A), (N)) +#define _m_pextrw(A, N) _mm_extract_pi16((A), (N)) +#endif /* Inserts word D into one of four words of A. The selector N must be immediate. */ +#ifdef __OPTIMIZE__ static __inline __m64 __attribute__((__always_inline__)) _mm_insert_pi16 (__m64 const __A, int const __D, int const __N) { @@ -1011,6 +1022,11 @@ _m_pinsrw (__m64 const __A, int const __D, int const __N) { return _mm_insert_pi16 (__A, __D, __N); } +#else +#define _mm_insert_pi16(A, D, N) \ + ((__m64) __builtin_ia32_vec_set_v4hi ((__v4hi)(A), (D), (N))) +#define _m_pinsrw(A, D, N) _mm_insert_pi16((A), (D), (N)) +#endif /* Compute the element-wise maximum of signed 16-bit values. */ static __inline __m64 __attribute__((__always_inline__)) @@ -1093,6 +1109,7 @@ _m_pmulhuw (__m64 __A, __m64 __B) /* Return a combination of the four 16-bit values in A. The selector must be an immediate. */ +#ifdef __OPTIMIZE__ static __inline __m64 __attribute__((__always_inline__)) _mm_shuffle_pi16 (__m64 __A, int const __N) { @@ -1104,6 +1121,11 @@ _m_pshufw (__m64 __A, int const __N) { return _mm_shuffle_pi16 (__A, __N); } +#else +#define _mm_shuffle_pi16(A, N) \ + ((__m64) __builtin_ia32_pshufw ((__v4hi)(A), (N))) +#define _m_pshufw(A, N) _mm_shuffle_pi16 ((A), (N)) +#endif /* Conditionally store byte elements of A into P. The high bit of each byte in the selector N determines whether the corresponding byte from @@ -1163,11 +1185,16 @@ _m_psadbw (__m64 __A, __m64 __B) /* Loads one cache line from address P to a location "closer" to the processor. The selector I specifies the type of prefetch operation. */ +#ifdef __OPTIMIZE__ static __inline void __attribute__((__always_inline__)) _mm_prefetch (void *__P, enum _mm_hint __I) { __builtin_prefetch (__P, 0, __I); } +#else +#define _mm_prefetch(P, I) \ + __builtin_prefetch ((P), 0, (I)) +#endif /* Stores the data in A to the address P without polluting the caches. */ static __inline void __attribute__((__always_inline__)) |