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authorliuhongt <hongtao.liu@intel.com>2021-01-28 14:07:00 +0800
committerliuhongt <hongtao.liu@intel.com>2021-02-05 09:56:49 +0800
commitb80fefd626460fb8924248622ba59dd56246703e (patch)
treeb8701a28432daef6cbefc57ecc81ab3a7c9b253e /gcc/config/i386/x86-tune.def
parenta19dd5e644ae8725f17bf52c54354b61f771d2c4 (diff)
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Enable X86_TUNE_AVX256_UNALIGNED_{LOAD,STORE}_OPTIMAL in generic tune.
gcc/ChangeLog: PR target/98172 * config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL): Remove m_GENERIC from ~list. (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Ditto.
Diffstat (limited to 'gcc/config/i386/x86-tune.def')
-rw-r--r--gcc/config/i386/x86-tune.def4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 7ace8da..f0e07c0 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -453,12 +453,12 @@ DEF_TUNE (X86_TUNE_AVOID_256FMA_CHAINS, "avoid_fma256_chains", m_ZNVER2 | m_ZNVE
/* X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL: if false, unaligned loads are
split. */
DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL, "256_unaligned_load_optimal",
- ~(m_NEHALEM | m_SANDYBRIDGE | m_GENERIC))
+ ~(m_NEHALEM | m_SANDYBRIDGE))
/* X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL: if false, unaligned stores are
split. */
DEF_TUNE (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL, "256_unaligned_store_optimal",
- ~(m_NEHALEM | m_SANDYBRIDGE | m_BDVER | m_ZNVER1 | m_GENERIC))
+ ~(m_NEHALEM | m_SANDYBRIDGE | m_BDVER | m_ZNVER1))
/* X86_TUNE_AVX256_SPLIT_REGS: if true, AVX256 ops are split into two AVX128 ops. */
DEF_TUNE (X86_TUNE_AVX256_SPLIT_REGS, "avx256_split_regs",m_BDVER | m_BTVER2