diff options
| author | wwwhhhyyy <hongyu.wang@intel.com> | 2021-08-30 16:41:41 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2022-01-16 12:43:02 +0800 |
| commit | 1c2575586c47f56a2e75f734af42371579516f0c (patch) | |
| tree | 00cfab3267531feb8987b3cec759731030662d9d /gcc/config/i386/x86-tune.def | |
| parent | 9248ee41478754b46b70f2409b85d9743ece9e72 (diff) | |
| download | gcc-1c2575586c47f56a2e75f734af42371579516f0c.zip gcc-1c2575586c47f56a2e75f734af42371579516f0c.tar.gz gcc-1c2575586c47f56a2e75f734af42371579516f0c.tar.bz2 | |
[i386] GLC tuning: Break false dependency for dest register.
For GoldenCove micro-architecture, force insert zero-idiom in asm
template to break false dependency of dest register for several insns.
The related insns are:
VPERM/D/Q/PS/PD
VRANGEPD/PS/SD/SS
VGETMANTSS/SD/SH
VGETMANDPS/PD - mem version only
VPMULLQ
VFMULCSH/PH
VFCMULCSH/PH
gcc/ChangeLog:
* config/i386/i386.h (TARGET_DEST_FALSE_DEP_FOR_GLC): New macro.
* config/i386/sse.md (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
Insert zero-idiom in output template when attr enabled, set new attribute to
true for non-mask/maskz insn.
(avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
Likewise.
(avx512dq_mul<mode>3<mask_name>): Likewise.
(<avx2_avx512>_permvar<mode><mask_name>): Likewise.
(avx2_perm<mode>_1<mask_name>): Likewise.
(avx512f_perm<mode>_1<mask_name>): Likewise.
(avx512dq_rangep<mode><mask_name><round_saeonly_name>): Likewise.
(avx512dq_ranges<mode><mask_scalar_name><round_saeonly_scalar_name>):
Likewise.
(<avx512>_getmant<mode><mask_name><round_saeonly_name>): Likewise.
(avx512f_vgetmant<mode><mask_scalar_name><round_saeonly_scalar_name>):
Likewise.
* config/i386/subst.md (mask3_dest_false_dep_for_glc_cond): New
subst_attr.
(mask4_dest_false_dep_for_glc_cond): Likewise.
(mask6_dest_false_dep_for_glc_cond): Likewise.
(mask10_dest_false_dep_for_glc_cond): Likewise.
(maskc_dest_false_dep_for_glc_cond): Likewise.
(mask_scalar4_dest_false_dep_for_glc_cond): Likewise.
(mask_scalarc_dest_false_dep_for_glc_cond): Likewise.
* config/i386/x86-tune.def (X86_TUNE_DEST_FALSE_DEP_FOR_GLC): New
DEF_TUNE enabled for m_SAPPHIRERAPIDS and m_ALDERLAKE
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx2-dest-false-dep-for-glc.c: New test.
* gcc.target/i386/avx512dq-dest-false-dep-for-glc.c: Ditto.
* gcc.target/i386/avx512f-dest-false-dep-for-glc.c: Ditto.
* gcc.target/i386/avx512fp16-dest-false-dep-for-glc.c: Ditto.
* gcc.target/i386/avx512fp16vl-dest-false-dep-for-glc.c: Ditto.
* gcc.target/i386/avx512vl-dest-false-dep-for-glc.c: Ditto.
Diffstat (limited to 'gcc/config/i386/x86-tune.def')
| -rw-r--r-- | gcc/config/i386/x86-tune.def | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 0d3fd07..f9eb3c2 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -79,6 +79,12 @@ DEF_TUNE (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY, m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_BONNELL | m_AMDFAM10 | m_BDVER | m_ZNVER | m_ALDERLAKE | m_GENERIC) +/* X86_TUNE_DEST_FALSE_DEP_FOR_GLC: This knob inserts zero-idiom before + several insns to break false dependency on the dest register for GLC + micro-architecture. */ +DEF_TUNE (X86_TUNE_DEST_FALSE_DEP_FOR_GLC, + "dest_false_dep_for_glc", m_SAPPHIRERAPIDS | m_ALDERLAKE) + /* X86_TUNE_SSE_SPLIT_REGS: Set for machines where the type and dependencies are resolved on SSE register parts instead of whole registers, so we may maintain just lower part of scalar values in proper format leaving the |