i386: Optimize code generation of __mm256_zextsi128_si256(__mm_set1_epi8(-1))

gcc/ChangeLog:

	PR target/94962
	* config/i386/constraints.md (BH): New define_constraint.
	* config/i386/i386.cc (standard_sse_constant_p): Add return
	3/4 when operand matches new predicate.
	(standard_sse_constant_opcode): Add new alternative branch to
	return "vpcmpeqd".
	* config/i386/predicates.md
	(vector_all_ones_zero_extend_half_operand): New define_predicate.
	(vector_all_ones_zero_extend_quarter_operand): Ditto.
	* config/i386/sse.md: Add constraint to insn "mov<mode>_internal".

gcc/testsuite/ChangeLog:

	PR target/94962
	* gcc.target/i386/avx256-unaligned-load-1.c: Modify test.
	* gcc.target/i386/avx256-unaligned-store-1.c: Ditto.
	* gcc.target/i386/avx256-unaligned-store-2.c: Ditto.
	* gcc.target/i386/avx256-unaligned-store-3.c: Ditto.
	* gcc.target/i386/pr94962-1.c: New test.
	* gcc.target/i386/pr94962-2.c: Ditto.
	* gcc.target/i386/pr94962-3.c: Ditto.
	* gcc.target/i386/pr94962-4.c: Ditto.

1 files changed, 25 insertions, 1 deletions

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index dadf453..ca799da 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -5186,7 +5186,8 @@ standard_80387_constant_rtx (int idx)
 				       XFmode);
 }
 
-/* Return 1 if X is all bits 0 and 2 if X is all bits 1
+/* Return 1 if X is all bits 0, 2 if X is all bits 1
+   and 3 if X is all bits 1 with zero extend
    in supported SSE/AVX vector mode.  */
 
 int
@@ -5234,6 +5235,10 @@ standard_sse_constant_p (rtx x, machine_mode pred_mode)
 	}
     }
 
+  if (vector_all_ones_zero_extend_half_operand (x, mode)
+      || vector_all_ones_zero_extend_quarter_operand (x, mode))
+    return 3;
+
   return 0;
 }
 
@@ -5341,6 +5346,25 @@ standard_sse_constant_opcode (rtx_insn *insn, rtx *operands)
 	  gcc_unreachable ();
 	}
    }
+  else if (vector_all_ones_zero_extend_half_operand (x, mode))
+    {
+      if (GET_MODE_SIZE (mode) == 64)
+	{
+	  gcc_assert (TARGET_AVX512F);
+	  return "vpcmpeqd \t %t0, %t0, %t0";
+	}
+      else if (GET_MODE_SIZE (mode) == 32)
+	{
+	  gcc_assert (TARGET_AVX);
+	  return "vpcmpeqd \t %x0, %x0, %x0";
+	}
+      gcc_unreachable ();
+    }
+  else if (vector_all_ones_zero_extend_quarter_operand (x, mode))
+    {
+      gcc_assert (TARGET_AVX512F);
+      return "vpcmpeqd \t %x0, %x0, %x0";
+    }
 
   gcc_unreachable ();
 }