aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/i386/i386-c.c
diff options
context:
space:
mode:
authorVenkataramanan Kumar <venkataramanan.kumar@amd.com>2015-10-06 12:48:41 +0000
committerVenkataramanan Kumar <vekumar@gcc.gnu.org>2015-10-06 12:48:41 +0000
commit9ce29eb05de83246802a03873ae1a6aaeae8e598 (patch)
tree14b6ecc2d46c8956d8eb05e97480b544af8092d3 /gcc/config/i386/i386-c.c
parent0580f6a1a8eba90a82c83b8341f94d25529b25e9 (diff)
downloadgcc-9ce29eb05de83246802a03873ae1a6aaeae8e598.zip
gcc-9ce29eb05de83246802a03873ae1a6aaeae8e598.tar.gz
gcc-9ce29eb05de83246802a03873ae1a6aaeae8e598.tar.bz2
AMD znver1 enablement.
2015-10-06 Venkataramanan Kumar <Venkataramanan.kumar@amd.com> AMD znver1 enablement. * config.gcc (i[34567]86-*-linux* | ...): Add znver1. (case ${target}): Add znver1. * config/i386/cpuid.h(bit_CLZERO): Define. * config/i386/driver-i386.c: (host_detect_local_cpu): Let -march=native recognize znver1 processors. * config/i386/i386-c.c (ix86_target_macros_internal): Add znver1, clzero def_and_undef. * config/i386/i386.c (struct processor_costs znver1_cost): New. (m_znver1): New definition. (m_AMD_MULTIPLE): Includes m_znver1. (processor_target_table): Add znver1 entry. (ix86_target_string) : Add clzero entry. (static const char *const cpu_names): Add znver1 entry. (ix86_option_override_internal): Add znver1 instruction sets. (PTA_CLZERO) : New definition. (ix86_option_override_internal): Handle new clzerooption. (ix86_issue_rate): Add znver1. (ix86_adjust_cost): Add znver1. (ia32_multipass_dfa_lookahead): Add znver1. (has_dispatch): Add znver1. * config/i386/i386.h (TARGET_znver1): New definition. (TARGET_CLZERO): Define. (TARGET_CLZERO_P): Define. (struct ix86_size_cost): Add TARGET_ZNVER1. (enum processor_type): Add PROCESSOR_znver1. * config/i386/i386.md (define_attr "cpu"): Add znver1. (set_attr znver1_decode): New definitions for znver1. * config/i386/i386.opt (flag_dispatch_scheduler): Add znver1. (mclzero): New. * config/i386/mmx.md (set_attr znver1_decode): New definitions for znver1. * config/i386/sse.md (set_attr znver1_decode): Likewise. * config/i386/x86-tune.def: Add znver1 tunings. * config/i386/znver1.md: Introduce znver1 cpu and include new md file. * gcc/doc/invoke.texi: Add details about znver1 From-SVN: r228520
Diffstat (limited to 'gcc/config/i386/i386-c.c')
-rw-r--r--gcc/config/i386/i386-c.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 58db7eb..9bc063e 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -123,6 +123,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__bdver4");
def_or_undef (parse_in, "__bdver4__");
break;
+ case PROCESSOR_ZNVER1:
+ def_or_undef (parse_in, "__znver1");
+ def_or_undef (parse_in, "__znver1__");
+ break;
case PROCESSOR_BTVER1:
def_or_undef (parse_in, "__btver1");
def_or_undef (parse_in, "__btver1__");
@@ -252,6 +256,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_BDVER4:
def_or_undef (parse_in, "__tune_bdver4__");
break;
+ case PROCESSOR_ZNVER1:
+ def_or_undef (parse_in, "__tune_znver1__");
+ break;
case PROCESSOR_BTVER1:
def_or_undef (parse_in, "__tune_btver1__");
break;
@@ -424,6 +431,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__SSE2_MATH__");
if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
def_or_undef (parse_in, "__CLFLUSHOPT__");
+ if (isa_flag & OPTION_MASK_ISA_CLZERO)
+ def_or_undef (parse_in, "__CLZERO__");
if (isa_flag & OPTION_MASK_ISA_XSAVEC)
def_or_undef (parse_in, "__XSAVEC__");
if (isa_flag & OPTION_MASK_ISA_XSAVES)