re PR target/31361 (SSE2 generation bug with shifts)

        PR target/31361
        * config/i386/i386.c (IX86_BUILTIN_PSLLDQ128, IX86_BUILTIN_PSLLW128,
        IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128, IX86_BUILTIN_PSRAW128,
        IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
        IX86_BUILTIN_PSRLQ128): New.
        (ix86_init_mmx_sse_builtins): Add them.
        (ix86_expand_builtin): Expand them.
        * config/i386/sse.md (ashr<mode>3, lshr<mode>3, ashl<mode>3): Make
        operand 2 be TImode.
        * config/i386/emmintrin.h (_mm_slli_epi64, _mm_srai_epi16,
        _mm_srai_epi32, _mm_srli_epi16, _mm_srli_epi32,
        _mm_srli_epi64): Mark __B const.
        (_mm_srli_si128, _mm_srli_si128): Fix disabled inline versions.
        (_mm_sll_epi16, _mm_sll_epi32, _mm_sll_epi64, _mm_sra_epi16,
        _mm_sra_epi32, _mm_srl_epi16, _mm_srl_epi32, _mm_srl_epi64): Use 
        new two-vector shift builtins.

From-SVN: r123250

1 files changed, 16 insertions, 16 deletions

diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h
index 002e16c..a230a70 100644
--- a/gcc/config/i386/emmintrin.h
+++ b/gcc/config/i386/emmintrin.h
@@ -1117,19 +1117,19 @@ _mm_slli_epi32 (__m128i __A, int __B)
 }
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_slli_epi64 (__m128i __A, int __B)
+_mm_slli_epi64 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psllqi128 ((__v2di)__A, __B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_srai_epi16 (__m128i __A, int __B)
+_mm_srai_epi16 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psrawi128 ((__v8hi)__A, __B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_srai_epi32 (__m128i __A, int __B)
+_mm_srai_epi32 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psradi128 ((__v4si)__A, __B);
 }
@@ -1138,13 +1138,13 @@ _mm_srai_epi32 (__m128i __A, int __B)
 static __m128i __attribute__((__always_inline__))
 _mm_srli_si128 (__m128i __A, const int __B)
 {
-  return ((__m128i)__builtin_ia32_psrldqi128 (__A, __B))
+  return ((__m128i)__builtin_ia32_psrldqi128 (__A, __B * 8));
 }
 
 static __m128i __attribute__((__always_inline__))
 _mm_srli_si128 (__m128i __A, const int __B)
 {
-  return ((__m128i)__builtin_ia32_pslldqi128 (__A, __B))
+  return ((__m128i)__builtin_ia32_pslldqi128 (__A, __B * 8));
 }
 #else
 #define _mm_srli_si128(__A, __B) \
@@ -1154,19 +1154,19 @@ _mm_srli_si128 (__m128i __A, const int __B)
 #endif
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_srli_epi16 (__m128i __A, int __B)
+_mm_srli_epi16 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psrlwi128 ((__v8hi)__A, __B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_srli_epi32 (__m128i __A, int __B)
+_mm_srli_epi32 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psrldi128 ((__v4si)__A, __B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
-_mm_srli_epi64 (__m128i __A, int __B)
+_mm_srli_epi64 (__m128i __A, const int __B)
 {
   return (__m128i)__builtin_ia32_psrlqi128 ((__v2di)__A, __B);
 }
@@ -1174,49 +1174,49 @@ _mm_srli_epi64 (__m128i __A, int __B)
 static __inline __m128i __attribute__((__always_inline__))
 _mm_sll_epi16 (__m128i __A, __m128i __B)
 {
-  return _mm_slli_epi16 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psllw128((__v8hi)__A, (__v8hi)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_sll_epi32 (__m128i __A, __m128i __B)
 {
-  return _mm_slli_epi32 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_pslld128((__v4si)__A, (__v4si)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_sll_epi64 (__m128i __A, __m128i __B)
 {
-  return _mm_slli_epi64 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psllq128((__v2di)__A, (__v2di)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_sra_epi16 (__m128i __A, __m128i __B)
 {
-  return _mm_srai_epi16 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psraw128 ((__v8hi)__A, (__v8hi)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_sra_epi32 (__m128i __A, __m128i __B)
 {
-  return _mm_srai_epi32 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psrad128 ((__v4si)__A, (__v4si)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_srl_epi16 (__m128i __A, __m128i __B)
 {
-  return _mm_srli_epi16 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psrlw128 ((__v8hi)__A, (__v8hi)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_srl_epi32 (__m128i __A, __m128i __B)
 {
-  return _mm_srli_epi32 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psrld128 ((__v4si)__A, (__v4si)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))
 _mm_srl_epi64 (__m128i __A, __m128i __B)
 {
-  return _mm_srli_epi64 (__A, _mm_cvtsi128_si32 (__B));
+  return (__m128i)__builtin_ia32_psrlq128 ((__v2di)__A, (__v2di)__B);
 }
 
 static __inline __m128i __attribute__((__always_inline__))