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| author | Andrew Stubbs <ams@codesourcery.com> | 2021-09-30 17:50:33 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2021-10-07 11:26:45 +0100 |
| commit | 81c362c7c2bccd72d798bf7ea6c74d4b1cc3931f (patch) | |
| tree | 6c787660bd66869147e18b91d4dd1ead77fd3120 /gcc/config/gcn/gcn-valu.md | |
| parent | 205dafb6edeca08419f4a5976be79bf7c86fd9a1 (diff) | |
| download | gcc-81c362c7c2bccd72d798bf7ea6c74d4b1cc3931f.zip gcc-81c362c7c2bccd72d798bf7ea6c74d4b1cc3931f.tar.gz gcc-81c362c7c2bccd72d798bf7ea6c74d4b1cc3931f.tar.bz2 | |
amdgcn: Fix assembler version incompatibility
This is another case of the global_load instruction format changing in LLVM
(because they fixed a bug). The configure test is already in place to detect
what is needed.
gcc/ChangeLog:
* config/gcn/gcn-valu.md (gather<mode>_insn_2offsets<exec>): Apply
HAVE_GCN_ASM_GLOBAL_LOAD_FIXED.
(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
Diffstat (limited to 'gcc/config/gcn/gcn-valu.md')
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 84ff675..01fdce6 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -827,8 +827,12 @@ /* Work around assembler bug in which a 64-bit register is expected, but a 32-bit value would be correct. */ int reg = REGNO (operands[2]) - FIRST_VGPR_REG; - sprintf (buf, "global_load%%o0\t%%0, v[%d:%d], %%1 offset:%%3%s\;" - "s_waitcnt\tvmcnt(0)", reg, reg + 1, glc); + if (HAVE_GCN_ASM_GLOBAL_LOAD_FIXED) + sprintf (buf, "global_load%%o0\t%%0, v%d, %%1 offset:%%3%s\;" + "s_waitcnt\tvmcnt(0)", reg, glc); + else + sprintf (buf, "global_load%%o0\t%%0, v[%d:%d], %%1 offset:%%3%s\;" + "s_waitcnt\tvmcnt(0)", reg, reg + 1, glc); } else gcc_unreachable (); @@ -958,8 +962,12 @@ /* Work around assembler bug in which a 64-bit register is expected, but a 32-bit value would be correct. */ int reg = REGNO (operands[1]) - FIRST_VGPR_REG; - sprintf (buf, "global_store%%s3\tv[%d:%d], %%3, %%0 offset:%%2%s", - reg, reg + 1, glc); + if (HAVE_GCN_ASM_GLOBAL_LOAD_FIXED) + sprintf (buf, "global_store%%s3\tv%d, %%3, %%0 offset:%%2%s", + reg, glc); + else + sprintf (buf, "global_store%%s3\tv[%d:%d], %%3, %%0 offset:%%2%s", + reg, reg + 1, glc); } else gcc_unreachable (); |