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authorxuli <xuli1@eswincomputing.com>2024-11-04 10:00:45 +0000
committerxuli <xuli1@eswincomputing.com>2024-11-07 01:51:35 +0000
commit1e2ae65a7f01fa3dcdbfd1bb5bc87b860172336d (patch)
treee2380078086fe956aba09341b19569f11c662fbb /gcc/config/gcn/driver-gcn.c
parentda31786910f253bba062d8f7126b269c432083ff (diff)
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RISC-V: Add testcases for signed imm SAT_ADD form1HEADtrunkmaster
This patch adds testcase for form1, as shown below: T __attribute__((noinline)) \ sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \ { \ T sum = (UT)x + (UT)IMM; \ return (x ^ IMM) < 0 \ ? sum \ : (sum ^ x) >= 0 \ ? sum \ : x < 0 ? MIN : MAX; \ } Passed the rv64gcv regression test. Signed-off-by: Li Xu <xuli1@eswincomputing.com> gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Support signed imm SAT_ADD form1. * gcc.target/riscv/sat_s_add_imm-1-1.c: New test. * gcc.target/riscv/sat_s_add_imm-1.c: New test. * gcc.target/riscv/sat_s_add_imm-2-1.c: New test. * gcc.target/riscv/sat_s_add_imm-2.c: New test. * gcc.target/riscv/sat_s_add_imm-3-1.c: New test. * gcc.target/riscv/sat_s_add_imm-3.c: New test. * gcc.target/riscv/sat_s_add_imm-4.c: New test. * gcc.target/riscv/sat_s_add_imm-run-1.c: New test. * gcc.target/riscv/sat_s_add_imm-run-2.c: New test. * gcc.target/riscv/sat_s_add_imm-run-3.c: New test. * gcc.target/riscv/sat_s_add_imm-run-4.c: New test.
Diffstat (limited to 'gcc/config/gcn/driver-gcn.c')
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