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authorVladimir Makarov <vmakarov@redhat.com>2011-03-28 01:53:24 +0000
committerVladimir Makarov <vmakarov@gcc.gnu.org>2011-03-28 01:53:24 +0000
commit99710245becabdfa97984d1f68a01f9876124417 (patch)
tree761665b37aeeeb5eb4e3f9b4770772ea49679cc0 /gcc/config/frv
parent0854e22029b6d45bc67140bf5d5493ee5c9294ef (diff)
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re PR bootstrap/48307 (Bootstrap failure)
2011-03-27 Vladimir Makarov <vmakarov@redhat.com> PR bootstrap/48307 Revert the previous patch. From-SVN: r171589
Diffstat (limited to 'gcc/config/frv')
-rw-r--r--gcc/config/frv/frv.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index 2c1abf3..299a856 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -970,6 +970,21 @@ enum reg_class
{ 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\
}
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \
+ ACCG_REGS, SPR_REGS, \
+ LIM_REG_CLASSES \
+}
+
/* A C expression whose value is a register class containing hard register
REGNO. In general there is more than one such class; choose a class which
is "minimal", meaning that no smaller class also contains the register. */