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| author | Alexandre Oliva <aoliva@redhat.com> | 2005-02-01 06:33:35 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@gcc.gnu.org> | 2005-02-01 06:33:35 +0000 |
| commit | 7b150713cf3dcfeabd4cc01ecd24f4843cd46c31 (patch) | |
| tree | 17fb9906b4b1c13fb22721a25ba78ef3468d22ce /gcc/config/frv/frv.md | |
| parent | e894ab29c7bb872bc9ff2bc79f1b7c05033563cb (diff) | |
| download | gcc-7b150713cf3dcfeabd4cc01ecd24f4843cd46c31.zip gcc-7b150713cf3dcfeabd4cc01ecd24f4843cd46c31.tar.gz gcc-7b150713cf3dcfeabd4cc01ecd24f4843cd46c31.tar.bz2 | |
frv.c (movcc_fp_destination_operand): New.
* config/frv/frv.c (movcc_fp_destination_operand): New.
(gpr_or_memory_operand): Fix typo in comment.
(gpr_or_memory_operand_with_scratch): New.
* config/frv/frv.h (PREDICATE_CODES): Add the two new predicates.
* config/frv/frv.md (movcc_fp, movcc_fp_internal): Use
movcc_fp_destination_operand.
(reload_incc_fp): Use gpr_or_memory_operand_with_scratch.
Legitimize memory addresses using a scratch register.
From-SVN: r94523
Diffstat (limited to 'gcc/config/frv/frv.md')
| -rw-r--r-- | gcc/config/frv/frv.md | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md index 0fc13e2..94520ef 100644 --- a/gcc/config/frv/frv.md +++ b/gcc/config/frv/frv.md @@ -2426,7 +2426,7 @@ ;; to make it conditional on reload. (define_expand "movcc_fp" - [(set (match_operand:CC_FP 0 "move_destination_operand" "") + [(set (match_operand:CC_FP 0 "movcc_fp_destination_operand" "") (match_operand:CC_FP 1 "move_source_operand" ""))] "TARGET_HAS_FPRS" " @@ -2436,7 +2436,7 @@ }") (define_insn "*movcc_fp_internal" - [(set (match_operand:CC_FP 0 "move_destination_operand" "=d,d,d,m") + [(set (match_operand:CC_FP 0 "movcc_fp_destination_operand" "=d,d,d,m") (match_operand:CC_FP 1 "move_source_operand" "u,d,m,d"))] "TARGET_HAS_FPRS && (reload_in_progress || reload_completed)" "@ @@ -2450,7 +2450,7 @@ (define_expand "reload_incc_fp" [(match_operand:CC_FP 0 "fcc_operand" "=u") - (match_operand:CC_FP 1 "memory_operand" "m") + (match_operand:CC_FP 1 "gpr_or_memory_operand_with_scratch" "m") (match_operand:TI 2 "integer_register_operand" "=&d")] "TARGET_HAS_FPRS" " @@ -2462,6 +2462,27 @@ int shift = CC_SHIFT_RIGHT (REGNO (operands[0])); HOST_WIDE_INT mask; + if (!gpr_or_memory_operand (operands[1], CC_FPmode)) + { + rtx addr; + rtx temp3 = simplify_gen_subreg (SImode, operands[2], TImode, 12); + + if (GET_CODE (operands[1]) != MEM) + abort (); + + addr = XEXP (operands[1], 0); + + if (GET_CODE (addr) != PLUS) + abort (); + + emit_move_insn (temp3, XEXP (addr, 1)); + + operands[1] = replace_equiv_address (operands[1], + gen_rtx_PLUS (GET_MODE (addr), + XEXP (addr, 0), + temp3)); + } + emit_insn (gen_movcc_fp (cc_op2, operands[1])); if (shift) emit_insn (gen_ashlsi3 (int_op2, int_op2, GEN_INT (shift))); |