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author | Nick Clifton <nickc@cygnus.com> | 2000-04-24 18:48:41 +0000 |
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committer | Nick Clifton <nickc@gcc.gnu.org> | 2000-04-24 18:48:41 +0000 |
commit | aaceac0baab45384da2038a70b97c5d19d264cbb (patch) | |
tree | 8c849a2cf2bd81d59ed1f52d97891a9f2075cdc1 /gcc/config/fr30 | |
parent | ac09f4822bdaf70d1f4e2e6873f680f62b3cd40f (diff) | |
download | gcc-aaceac0baab45384da2038a70b97c5d19d264cbb.zip gcc-aaceac0baab45384da2038a70b97c5d19d264cbb.tar.gz gcc-aaceac0baab45384da2038a70b97c5d19d264cbb.tar.bz2 |
Fix bug building libgcc:
Do not generate small add insn if the source register is eliminable.
From-SVN: r33387
Diffstat (limited to 'gcc/config/fr30')
-rw-r--r-- | gcc/config/fr30/fr30.md | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md index afa2e2f..1b8d310 100644 --- a/gcc/config/fr30/fr30.md +++ b/gcc/config/fr30/fr30.md @@ -621,7 +621,10 @@ emit_insn (gen_addsi_regs (operands[0], operands[1], operands[2])); else if (GET_CODE (operands[2]) != CONST_INT) emit_insn (gen_addsi_big_int (operands[0], operands[1], operands[2])); - else if ((INTVAL (operands[2]) >= -16) && (INTVAL (operands[2]) <= 15)) + else if ( (REGNO (operands[1]) != FRAME_POINTER_REGNUM) + && (REGNO (operands[1]) != ARG_POINTER_REGNUM) + && (INTVAL (operands[2]) >= -16) + && (INTVAL (operands[2]) <= 15)) emit_insn (gen_addsi_small_int (operands[0], operands[1], operands[2])); else emit_insn (gen_addsi_big_int (operands[0], operands[1], operands[2])); @@ -637,11 +640,15 @@ "addn %2, %0" ) +;; Do not allow an eliminable register in the source register. It +;; might be eliminated in favour of the stack pointer, probably +;; increasing the offset, and so rendering the instruction illegal. (define_insn "addsi_small_int" [(set (match_operand:SI 0 "register_operand" "=r,r") (plus:SI (match_operand:SI 1 "register_operand" "0,0") (match_operand:SI 2 "add_immediate_operand" "I,J")))] - "" + " (REGNO (operands[1]) != FRAME_POINTER_REGNUM) + && (REGNO (operands[1]) != ARG_POINTER_REGNUM)" "@ addn %2, %0 addn2 %2, %0" |