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author | David Malcolm <dmalcolm@redhat.com> | 2014-08-19 00:54:22 +0000 |
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committer | David Malcolm <dmalcolm@gcc.gnu.org> | 2014-08-19 00:54:22 +0000 |
commit | 0f82e5c9fb49a2618233fcaca6db40fe856e66c1 (patch) | |
tree | 03e829aeeea83ad9c7386f8e4821c145e377edbe /gcc/config/c6x | |
parent | 9c9afb6905bfc13e8ba14474fed4b476b0e7f837 (diff) | |
download | gcc-0f82e5c9fb49a2618233fcaca6db40fe856e66c1.zip gcc-0f82e5c9fb49a2618233fcaca6db40fe856e66c1.tar.gz gcc-0f82e5c9fb49a2618233fcaca6db40fe856e66c1.tar.bz2 |
Split NEXT_INSN/PREV_INSN into lvalue and rvalue forms
/
2014-08-19 David Malcolm <dmalcolm@redhat.com>
* rtx-classes-status.txt: Add SET_NEXT_INSN, SET_PREV_INSN.
gcc/
2014-08-19 David Malcolm <dmalcolm@redhat.com>
* rtl.h (PREV_INSN): Split macro in two: the existing one,
for rvalues, and...
(SET_PREV_INSN): New macro, for use as an lvalue.
(NEXT_INSN, SET_NEXT_INSN): Likewise.
* caller-save.c (save_call_clobbered_regs): Convert lvalue use of
PREV_INSN/NEXT_INSN into SET_PREV_INSN/SET_NEXT_INSN.
* cfgrtl.c (try_redirect_by_replacing_jump): Likewise.
(fixup_abnormal_edges): Likewise.
(unlink_insn_chain): Likewise.
(fixup_reorder_chain): Likewise.
(cfg_layout_delete_block): Likewise.
(cfg_layout_merge_blocks): Likewise.
* combine.c (update_cfg_for_uncondjump): Likewise.
* emit-rtl.c (link_insn_into_chain): Likewise.
(remove_insn): Likewise.
(delete_insns_since): Likewise.
(reorder_insns_nobb): Likewise.
(emit_insn_after_1): Likewise.
* final.c (rest_of_clean_state): Likewise.
(final_scan_insn): Likewise.
* gcse.c (can_assign_to_reg_without_clobbers_p): Likewise.
* haifa-sched.c (concat_note_lists): Likewise.
(remove_notes): Likewise.
(restore_other_notes): Likewise.
(move_insn): Likewise.
(unlink_bb_notes): Likewise.
(restore_bb_notes): Likewise.
* jump.c (delete_for_peephole): Likewise.
* optabs.c (emit_libcall_block_1): Likewise.
* reorg.c (emit_delay_sequence): Likewise.
(fill_simple_delay_slots): Likewise.
* sel-sched-ir.c (sel_move_insn): Likewise.
(sel_remove_insn): Likewise.
(get_bb_note_from_pool): Likewise.
* sel-sched.c (move_nop_to_previous_block): Likewise.
* config/bfin/bfin.c (reorder_var_tracking_notes): Likewise.
* config/c6x/c6x.c (gen_one_bundle): Likewise.
(c6x_gen_bundles): Likewise.
(hwloop_optimize): Likewise.
* config/frv/frv.c (frv_function_prologue): Likewise.
(frv_register_nop): Likewise.
* config/ia64/ia64.c (ia64_init_dfa_pre_cycle_insn): Likewise.
(ia64_reorg): Likewise.
* config/mep/mep.c (mep_reorg_addcombine): Likewise.
(mep_make_bundle): Likewise.
(mep_bundle_insns): Likewise.
* config/picochip/picochip.c (reorder_var_tracking_notes): Likewise.
* config/tilegx/tilegx.c (reorder_var_tracking_notes): Likewise.
* config/tilepro/tilepro.c (reorder_var_tracking_notes): Likewise.
From-SVN: r214128
Diffstat (limited to 'gcc/config/c6x')
-rw-r--r-- | gcc/config/c6x/c6x.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c index 90241ea..889031a 100644 --- a/gcc/config/c6x/c6x.c +++ b/gcc/config/c6x/c6x.c @@ -4599,7 +4599,7 @@ gen_one_bundle (rtx *slot, int n_filled, int real_first) bundle = make_insn_raw (bundle); BLOCK_FOR_INSN (bundle) = BLOCK_FOR_INSN (slot[0]); INSN_LOCATION (bundle) = INSN_LOCATION (slot[0]); - PREV_INSN (bundle) = PREV_INSN (slot[real_first]); + SET_PREV_INSN (bundle) = SET_PREV_INSN (slot[real_first]); t = NULL_RTX; @@ -4607,18 +4607,18 @@ gen_one_bundle (rtx *slot, int n_filled, int real_first) { rtx insn = slot[i]; remove_insn (insn); - PREV_INSN (insn) = t ? t : PREV_INSN (bundle); + SET_PREV_INSN (insn) = t ? t : PREV_INSN (bundle); if (t != NULL_RTX) - NEXT_INSN (t) = insn; + SET_NEXT_INSN (t) = insn; t = insn; if (i > 0) INSN_LOCATION (slot[i]) = INSN_LOCATION (bundle); } - NEXT_INSN (bundle) = NEXT_INSN (PREV_INSN (bundle)); - NEXT_INSN (t) = NEXT_INSN (bundle); - NEXT_INSN (PREV_INSN (bundle)) = bundle; - PREV_INSN (NEXT_INSN (bundle)) = bundle; + SET_NEXT_INSN (bundle) = NEXT_INSN (PREV_INSN (bundle)); + SET_NEXT_INSN (t) = NEXT_INSN (bundle); + SET_NEXT_INSN (PREV_INSN (bundle)) = bundle; + SET_PREV_INSN (NEXT_INSN (bundle)) = bundle; } /* Move all parallel instructions into SEQUENCEs, so that no subsequent passes @@ -4710,12 +4710,12 @@ c6x_gen_bundles (void) continue; if (NEXT_INSN (last_call) == insn) continue; - NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn); - PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn); - PREV_INSN (insn) = last_call; - NEXT_INSN (insn) = NEXT_INSN (last_call); - PREV_INSN (NEXT_INSN (insn)) = insn; - NEXT_INSN (PREV_INSN (insn)) = insn; + SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn); + SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn); + SET_PREV_INSN (insn) = last_call; + SET_NEXT_INSN (insn) = NEXT_INSN (last_call); + SET_PREV_INSN (NEXT_INSN (insn)) = insn; + SET_NEXT_INSN (PREV_INSN (insn)) = insn; last_call = insn; } } @@ -5698,8 +5698,8 @@ hwloop_optimize (hwloop_info loop) reservations of the instructions contained in it to the corresponding instructions from iteration 0, which are the only ones we'll keep. */ assign_reservations (BB_HEAD (bb), ss.last_scheduled_insn); - PREV_INSN (BB_END (bb)) = ss.last_scheduled_iter0; - NEXT_INSN (ss.last_scheduled_iter0) = BB_END (bb); + SET_PREV_INSN (BB_END (bb)) = ss.last_scheduled_iter0; + SET_NEXT_INSN (ss.last_scheduled_iter0) = BB_END (bb); filter_insns_above (bb, sploop_max_uid_iter0); for (i = 0; i < n_real_insns; i++) @@ -5821,13 +5821,13 @@ hwloop_optimize (hwloop_info loop) for (i = 1; i < n_insns; i++) { - NEXT_INSN (orig_vec[i - 1]) = orig_vec[i]; - PREV_INSN (orig_vec[i]) = orig_vec[i - 1]; + SET_NEXT_INSN (orig_vec[i - 1]) = orig_vec[i]; + SET_PREV_INSN (orig_vec[i]) = orig_vec[i - 1]; } - PREV_INSN (orig_vec[0]) = PREV_INSN (BB_HEAD (bb)); - NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0]; - NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb)); - PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1]; + SET_PREV_INSN (orig_vec[0]) = PREV_INSN (BB_HEAD (bb)); + SET_NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0]; + SET_NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb)); + SET_PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1]; SET_BB_HEAD (bb) = orig_vec[0]; SET_BB_END (bb) = orig_vec[n_insns - 1]; undo_splits: |