aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/bpf/bpf.h
diff options
context:
space:
mode:
authorDavid Faust <david.faust@oracle.com>2023-07-24 09:45:17 -0700
committerDavid Faust <david.faust@oracle.com>2023-07-26 09:29:33 -0700
commitdb189d02ef150517e955d0d7a913168dd48f21cd (patch)
tree0faed333285ee20c457d7aeffd79b17036370178 /gcc/config/bpf/bpf.h
parent7931a1de9ec87b996d51d3d60786f5c81f63919f (diff)
downloadgcc-db189d02ef150517e955d0d7a913168dd48f21cd.zip
gcc-db189d02ef150517e955d0d7a913168dd48f21cd.tar.gz
gcc-db189d02ef150517e955d0d7a913168dd48f21cd.tar.bz2
bpf: add v3 atomic instructions
This patch adds support for the general atomic operations introduced in eBPF v3. In addition to the existing atomic add instruction, this adds: - Atomic and, or, xor - Fetching versions of these operations (including add) - Atomic exchange - Atomic compare-and-exchange To control emission of these instructions, a new target option -m[no-]v3-atomics is added. This option is enabled by -mcpu=v3 and above. Support for these instructions was recently added in binutils. gcc/ * config/bpf/bpf.opt (mv3-atomics): New option. * config/bpf/bpf.cc (bpf_option_override): Handle it here. * config/bpf/bpf.h (enum_reg_class): Add R0 class. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. (REGNO_REG_CLASS): Handle R0. * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD. (UNSPEC_AAND): New unspec. (UNSPEC_AOR): Likewise. (UNSPEC_AXOR): Likewise. (UNSPEC_AFADD): Likewise. (UNSPEC_AFAND): Likewise. (UNSPEC_AFOR): Likewise. (UNSPEC_AFXOR): Likewise. (UNSPEC_AXCHG): Likewise. (UNSPEC_ACMPX): Likewise. (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute. Move to... * config/bpf/atomic.md: ...Here. New file. * config/bpf/constraints.md (t): New constraint for R0. * doc/invoke.texi (eBPF Options): Document -mv3-atomics. gcc/testsuite/ * gcc.target/bpf/atomic-cmpxchg-1.c: New test. * gcc.target/bpf/atomic-cmpxchg-2.c: New test. * gcc.target/bpf/atomic-fetch-op-1.c: New test. * gcc.target/bpf/atomic-fetch-op-2.c: New test. * gcc.target/bpf/atomic-fetch-op-3.c: New test. * gcc.target/bpf/atomic-op-1.c: New test. * gcc.target/bpf/atomic-op-2.c: New test. * gcc.target/bpf/atomic-op-3.c: New test. * gcc.target/bpf/atomic-xchg-1.c: New test. * gcc.target/bpf/atomic-xchg-2.c: New test.
Diffstat (limited to 'gcc/config/bpf/bpf.h')
-rw-r--r--gcc/config/bpf/bpf.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/gcc/config/bpf/bpf.h b/gcc/config/bpf/bpf.h
index 9561bf5..ccba7f8 100644
--- a/gcc/config/bpf/bpf.h
+++ b/gcc/config/bpf/bpf.h
@@ -177,6 +177,7 @@
enum reg_class
{
NO_REGS, /* no registers in set. */
+ R0, /* register r0. */
ALL_REGS, /* all registers. */
LIM_REG_CLASSES /* max value + 1. */
};
@@ -190,6 +191,7 @@ enum reg_class
#define REG_CLASS_NAMES \
{ \
"NO_REGS", \
+ "R0", \
"ALL_REGS" \
}
@@ -203,6 +205,7 @@ enum reg_class
#define REG_CLASS_CONTENTS \
{ \
0x00000000, /* NO_REGS */ \
+ 0x00000001, /* R0 */ \
0x00000fff, /* ALL_REGS */ \
}
@@ -210,7 +213,8 @@ enum reg_class
register REGNO. In general there is more that one such class;
choose a class which is "minimal", meaning that no smaller class
also contains the register. */
-#define REGNO_REG_CLASS(REGNO) ((void)(REGNO), GENERAL_REGS)
+#define REGNO_REG_CLASS(REGNO) \
+ ((REGNO) == 0 ? R0 : GENERAL_REGS)
/* A macro whose definition is the name of the class to which a
valid base register must belong. A base register is one used in