alpha.c (alpha_preferred_reload_class, [...]): Avoid C++ keywords.

	* config/alpha/alpha.c (alpha_preferred_reload_class,
	alpha_secondary_reload, alpha_emit_set_const_1, function_value,
	alpha_output_mi_thunk_osf): Avoid C++ keywords.
	* config/arm/arm.c (output_move_vfp, output_move_neon): Likewise.
	* config/arm/arm.md: Likewise.
	* config/avr/avr-protos.h (preferred_reload_class,
	test_hard_reg_class, avr_simplify_comparison_p,
	out_shift_with_cnt, class_max_nregs): Likewise.
	* config/avr/avr.c (class_max_nregs, avr_simplify_comparison_p,
	output_movqi, output_movhi, output_movsisf, out_shift_with_cnt,
	preferred_reload_class, test_hard_reg_class): Likewise.
	* config/bfin/bfin.c (legitimize_pic_address, hard_regno_mode_ok,
	bfin_memory_move_cost, bfin_secondary_reload,
	bfin_output_mi_thunk): Likewise.
	* config/crx/crx.c (crx_secondary_reload_class,
	crx_memory_move_cost): Likewise.
	* config/frv/frv-protos.h (frv_secondary_reload_class,
	frv_class_likely_spilled_p, frv_class_max_nregs): Likewise.
	* config/frv/frv.c (frv_override_options, frv_alloc_temp_reg,
	frv_secondary_reload_class, frv_class_likely_spilled_p,
	frv_class_max_nregs): Likewise.
	* config/h8300/h8300.c (h8300_classify_operand,
	h8300_unary_length, h8300_bitfield_length, h8300_asm_insn_count):
	Likewise.
	* config/i386/winnt.c (i386_pe_declare_function_type): Likewise.
	* config/ia64/ia64.c (ia64_preferred_reload_class,
	ia64_secondary_reload_class, ia64_output_mi_thunk): Likewise.
	* config/iq2000/iq2000.c (gen_int_relational): Likewise.
	* config/m32c/m32c.c (class_can_hold_mode, m32c_output_compare):
	Likewise.
	* config/m68hc11/m68hc11.c (preferred_reload_class,
	m68hc11_memory_move_cost): Likewise.
	* config/mcore/mcore.c (mcore_secondary_reload_class,
	mcore_reload_class): Likewise.
	* config/mips/mips.c (mips_hard_regno_mode_ok_p,
	mips_class_max_nregs, mips_cannot_change_mode_class,
	mips_preferred_reload_class, mips_secondary_reload_class,
	mips_output_mi_thunk): Likewise.
	* config/mmix/mmix.c (mmix_preferred_reload_class,
	mmix_preferred_output_reload_class, mmix_secondary_reload_class):
	Likewise.
	* config/mn10300/mn10300.c (mn10300_secondary_reload_class):
	Likewise.
	* config/pa/pa.c (pa_secondary_reload, pa_combine_instructions,
	pa_can_combine_p, pa_cannot_change_mode_class): Likewise.
	* config/pa/pa.h (LEGITIMIZE_RELOAD_ADDRESS): Likewise.
	* config/rs6000/rs6000.c (paired_expand_vector_init,
	rs6000_secondary_reload_class, rs6000_output_mi_thunk,
	compare_section_name, rs6000_memory_move_cost): Likewise.
	* config/s390/s390.c (s390_emit_compare_and_swap,
	s390_preferred_reload_class, s390_secondary_reload,
	legitimize_pic_address, legitimize_tls_address,
	legitimize_reload_address, s390_expand_cs_hqi, s390_expand_atomic,
	s390_class_max_nregs): Likewise.
	* config/s390/s390.h (LEGITIMIZE_RELOAD_ADDRESS): Likewise.
	* config/s390/s390.md: Likewise.
	* config/score/score-protos.h (score_secondary_reload_class,
	score_preferred_reload_class): Likewise.
	* config/score/score.c (score_preferred_reload_class,
	score_secondary_reload_class): Likewise.
	* config/score/score3.c (score3_output_mi_thunk,
	score3_preferred_reload_class, score3_secondary_reload_class,
	score3_hard_regno_mode_ok): Likewise.
	* config/score/score3.h (score3_preferred_reload_class,
	score3_secondary_reload_class): Likewise.
	* config/score/score7.c (score7_output_mi_thunk,
	score7_preferred_reload_class, score7_secondary_reload_class,
	score7_hard_regno_mode_ok): Likewise.
	* config/score/score7.h (score7_preferred_reload_class,
	score7_secondary_reload_class): Likewise.
	* config/sh/sh.c (prepare_move_operands, output_far_jump,
	output_branchy_insn, add_constant, gen_block_redirect,
	sh_insn_length_adjustment, sh_cannot_change_mode_class,
	sh_output_mi_thunk, replace_n_hard_rtx, sh_secondary_reload):
	Likewise.
	* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
	* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi,
	xstormy16_output_cbranch_si, xstormy16_secondary_reload_class,
	xstormy16_preferred_reload_class): Likewise.
	* config/xtensa/xtensa.c (xtensa_expand_compare_and_swap,
	xtensa_expand_atomic, override_options,
	xtensa_preferred_reload_class, xtensa_secondary_reload_class):
	Likewise.
	* reorg.c (try_merge_delay_insns): Likewise.
	* tree.c (merge_dllimport_decl_attributes): Likewise.

	* config/frv/frv.c (frv_print_operand): Change isalpha to ISALPHA.

From-SVN: r138813

2 files changed, 25 insertions, 25 deletions

diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h
index 7665555..bcf81d9 100644
--- a/gcc/config/avr/avr-protos.h
+++ b/gcc/config/avr/avr-protos.h
@@ -94,7 +94,7 @@ extern void avr_output_bld (rtx operands[], int bit_nr);
 extern void avr_output_addr_vec_elt (FILE *stream, int value);
 extern const char *avr_out_sbxx_branch (rtx insn, rtx operands[]);
 
-extern enum reg_class preferred_reload_class (rtx x, enum reg_class class);
+extern enum reg_class preferred_reload_class (rtx x, enum reg_class rclass);
 extern int extra_constraint_Q (rtx x);
 extern rtx legitimize_address (rtx x, rtx oldx, enum machine_mode mode);
 extern int adjust_insn_length (rtx insn, int len);
@@ -111,21 +111,21 @@ extern int reg_unused_after (rtx insn, rtx reg);
 extern int _reg_unused_after (rtx insn, rtx reg);
 extern int avr_jump_mode (rtx x, rtx insn);
 extern int byte_immediate_operand (rtx op, enum machine_mode mode);
-extern int test_hard_reg_class (enum reg_class class, rtx x);
+extern int test_hard_reg_class (enum reg_class rclass, rtx x);
 extern int jump_over_one_insn_p (rtx insn, rtx dest);
 
 extern int avr_hard_regno_mode_ok (int regno, enum machine_mode mode);
 extern void final_prescan_insn (rtx insn, rtx *operand, int num_operands);
 extern int avr_simplify_comparison_p (enum machine_mode mode,
-				      RTX_CODE operator, rtx x);
+				      RTX_CODE op, rtx x);
 extern RTX_CODE avr_normalize_condition (RTX_CODE condition);
 extern int compare_eq_p (rtx insn);
-extern void out_shift_with_cnt (const char *template, rtx insn,
+extern void out_shift_with_cnt (const char *templ, rtx insn,
 				rtx operands[], int *len, int t_len);
 #endif /* RTX_CODE */
 
 #ifdef HAVE_MACHINE_MODES
-extern int class_max_nregs (enum reg_class class, enum machine_mode mode);
+extern int class_max_nregs (enum reg_class rclass, enum machine_mode mode);
 #endif /* HAVE_MACHINE_MODES */
 
 #ifdef REAL_VALUE_TYPE
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 84625d8..1b1650f 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -1403,7 +1403,7 @@ notice_update_cc (rtx body ATTRIBUTE_UNUSED, rtx insn)
    class CLASS needed to hold a value of mode MODE.  */
 
 int
-class_max_nregs (enum reg_class class ATTRIBUTE_UNUSED,enum machine_mode mode)
+class_max_nregs (enum reg_class rclass ATTRIBUTE_UNUSED,enum machine_mode mode)
 {
   return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD);
 }
@@ -1566,14 +1566,14 @@ final_prescan_insn (rtx insn, rtx *operand ATTRIBUTE_UNUSED,
 /* Return 0 if undefined, 1 if always true or always false.  */
 
 int
-avr_simplify_comparison_p (enum machine_mode mode, RTX_CODE operator, rtx x)
+avr_simplify_comparison_p (enum machine_mode mode, RTX_CODE op, rtx x)
 {
   unsigned int max = (mode == QImode ? 0xff :
                       mode == HImode ? 0xffff :
                       mode == SImode ? 0xffffffff : 0);
-  if (max && operator && GET_CODE (x) == CONST_INT)
+  if (max && op && GET_CODE (x) == CONST_INT)
     {
-      if (unsigned_condition (operator) != operator)
+      if (unsigned_condition (op) != op)
 	max >>= 1;
 
       if (max != (INTVAL (x) & max)
@@ -1743,15 +1743,15 @@ output_movqi (rtx insn, rtx operands[], int *l)
     }
   else if (GET_CODE (dest) == MEM)
     {
-      const char *template;
+      const char *templ;
 
       if (src == const0_rtx)
 	operands[1] = zero_reg_rtx;
 
-      template = out_movqi_mr_r (insn, operands, real_l);
+      templ = out_movqi_mr_r (insn, operands, real_l);
 
       if (!real_l)
-	output_asm_insn (template, operands);
+	output_asm_insn (templ, operands);
 
       operands[1] = src;
     }
@@ -1893,15 +1893,15 @@ output_movhi (rtx insn, rtx operands[], int *l)
     }
   else if (GET_CODE (dest) == MEM)
     {
-      const char *template;
+      const char *templ;
 
       if (src == const0_rtx)
 	operands[1] = zero_reg_rtx;
 
-      template = out_movhi_mr_r (insn, operands, real_l);
+      templ = out_movhi_mr_r (insn, operands, real_l);
 
       if (!real_l)
-	output_asm_insn (template, operands);
+	output_asm_insn (templ, operands);
 
       operands[1] = src;
       return "";
@@ -2581,15 +2581,15 @@ output_movsisf(rtx insn, rtx operands[], int *l)
     }
   else if (GET_CODE (dest) == MEM)
     {
-      const char *template;
+      const char *templ;
 
       if (src == const0_rtx)
 	  operands[1] = zero_reg_rtx;
 
-      template = out_movsi_mr_r (insn, operands, real_l);
+      templ = out_movsi_mr_r (insn, operands, real_l);
 
       if (!real_l)
-	output_asm_insn (template, operands);
+	output_asm_insn (templ, operands);
 
       operands[1] = src;
       return "";
@@ -2930,7 +2930,7 @@ out_tstsi (rtx insn, int *l)
    carefully hand-optimized in ?sh??i3_out.  */
 
 void
-out_shift_with_cnt (const char *template, rtx insn, rtx operands[],
+out_shift_with_cnt (const char *templ, rtx insn, rtx operands[],
 		    int *len, int t_len)
 {
   rtx op[10];
@@ -2975,7 +2975,7 @@ out_shift_with_cnt (const char *template, rtx insn, rtx operands[],
 	  else
 	    {
 	      while (count-- > 0)
-		output_asm_insn (template, op);
+		output_asm_insn (templ, op);
 	    }
 
 	  return;
@@ -3056,7 +3056,7 @@ out_shift_with_cnt (const char *template, rtx insn, rtx operands[],
   else
     {
       strcat (str, "\n1:\t");
-      strcat (str, template);
+      strcat (str, templ);
       strcat (str, second_label ? "\n2:\t" : "\n\t");
       strcat (str, use_zero_reg ? AS1 (lsr,%3) : AS1 (dec,%3));
       strcat (str, CR_TAB);
@@ -5735,19 +5735,19 @@ avr_function_value (const_tree type,
    in class CLASS.  */
 
 enum reg_class
-preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class class)
+preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass)
 {
-  return class;
+  return rclass;
 }
 
 int
-test_hard_reg_class (enum reg_class class, rtx x)
+test_hard_reg_class (enum reg_class rclass, rtx x)
 {
   int regno = true_regnum (x);
   if (regno < 0)
     return 0;
 
-  if (TEST_HARD_REG_CLASS (class, regno))
+  if (TEST_HARD_REG_CLASS (rclass, regno))
     return 1;
 
   return 0;