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| author | Michael Collison <michael.collison@linaro.org> | 2015-11-06 22:38:25 +0000 |
|---|---|---|
| committer | Michael Collison <collison@gcc.gnu.org> | 2015-11-06 22:38:25 +0000 |
| commit | 84d289d4b799707af519962a7d2670c71176d7a1 (patch) | |
| tree | c5ca0201667eec21f2563523c80f2406a1f6124a /gcc/config/arm | |
| parent | 11c7f78838d7587f95e28e6cbf4695a02c37d842 (diff) | |
| download | gcc-84d289d4b799707af519962a7d2670c71176d7a1.zip gcc-84d289d4b799707af519962a7d2670c71176d7a1.tar.gz gcc-84d289d4b799707af519962a7d2670c71176d7a1.tar.bz2 | |
revert: arm.md (*arm_smin_cmp): New pattern.
2015-11-06 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Revert:
2015-08-01 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/arm.md (*arm_smin_cmp): New pattern.
(*arm_umin_cmp): Likewise.
2015-11-06 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Revert:
2015-08-01 Michael Collison <michael.collison@linaro.org
Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* gcc.target/arm/mincmp.c: New test.
From-SVN: r229895
Diffstat (limited to 'gcc/config/arm')
| -rw-r--r-- | gcc/config/arm/arm.md | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e087c1a..8ebb1bf 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3455,44 +3455,6 @@ (set_attr "type" "multiple,multiple")] ) -;; t = (s/u)min (x, y) -;; cc = cmp (t, z) -;; is the same as -;; cmp x, z -;; cmpge(u) y, z - -(define_insn_and_split "*arm_smin_cmp" - [(set (reg:CC CC_REGNUM) - (compare:CC - (smin:SI (match_operand:SI 0 "s_register_operand" "r") - (match_operand:SI 1 "s_register_operand" "r")) - (match_operand:SI 2 "s_register_operand" "r")))] - "TARGET_32BIT" - "#" - "&& reload_completed" - [(set (reg:CC CC_REGNUM) - (compare:CC (match_dup 0) (match_dup 2))) - (cond_exec (ge:CC (reg:CC CC_REGNUM) (const_int 0)) - (set (reg:CC CC_REGNUM) - (compare:CC (match_dup 1) (match_dup 2))))] -) - -(define_insn_and_split "*arm_umin_cmp" - [(set (reg:CC CC_REGNUM) - (compare:CC - (umin:SI (match_operand:SI 0 "s_register_operand" "r") - (match_operand:SI 1 "s_register_operand" "r")) - (match_operand:SI 2 "s_register_operand" "r")))] - "TARGET_32BIT" - "#" - "&& reload_completed" - [(set (reg:CC CC_REGNUM) - (compare:CC (match_dup 0) (match_dup 2))) - (cond_exec (geu:CC (reg:CC CC_REGNUM) (const_int 0)) - (set (reg:CC CC_REGNUM) - (compare:CC (match_dup 1) (match_dup 2))))] -) - (define_expand "umaxsi3" [(parallel [ (set (match_operand:SI 0 "s_register_operand" "") |